Lines Matching refs:sscr0
66 uint32_t sscr0;
68 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
69 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
74 uint32_t sscr0;
76 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
77 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
187 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
190 sscr0 &= ~0x0000ff00;
191 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
193 sscr0 &= ~0x000fff00;
194 sscr0 |= (div - 1) << 8; /* 1..4096 */
196 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
208 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
232 sscr0 |= SSCR0_MOD;
243 sscr0 |= SSCR0_ECS;
247 sscr0 |= SSCR0_NCS | SSCR0_MOD;
252 sscr0 |= SSCR0_ACS;
262 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
341 u32 sscr0;
343 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
344 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
348 sscr0 |= SSCR0_EDSS | SSCR0_DataSize(slot_width - 16);
350 sscr0 |= SSCR0_DataSize(slot_width);
354 sscr0 |= SSCR0_MOD;
357 sscr0 |= SSCR0_SlotsPerFrm(slots);
363 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
436 u32 sscr0, sscr1, sspsp, scfr;
443 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
484 sscr0 |= SSCR0_PSP;
493 sscr0 |= SSCR0_MOD | SSCR0_PSP;
501 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
556 u32 sscr0, sspsp;
583 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
589 sscr0 |= SSCR0_FPCKE;
590 sscr0 |= SSCR0_DataSize(16);
593 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
596 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
599 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
601 if (sscr0 & SSCR0_ACS) {
638 } else if (sscr0 & SSCR0_ECS) {
689 if ((sscr0 & SSCR0_MOD) && !ttsa) {
702 uint32_t sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
707 if (value && (sscr0 & SSCR0_SSE))
708 pxa_ssp_write_reg(ssp, SSCR0, sscr0 & ~SSCR0_SSE);
727 pxa_ssp_write_reg(ssp, SSCR0, sscr0 | SSCR0_SSE);