Lines Matching refs:afe
3 // mt8183-afe-clk.c -- Mediatek 8183 afe clock ctrl
10 #include "mt8183-afe-common.h"
11 #include "mt8183-afe-clk.h"
92 int mt8183_init_clock(struct mtk_base_afe *afe)
94 struct mt8183_afe_private *afe_priv = afe->platform_priv;
97 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),
103 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);
105 dev_err(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n",
115 int mt8183_afe_enable_clock(struct mtk_base_afe *afe)
117 struct mt8183_afe_private *afe_priv = afe->platform_priv;
122 dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
129 dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
137 dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",
145 dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
153 dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",
161 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
168 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
175 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
182 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
189 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
214 int mt8183_afe_disable_clock(struct mtk_base_afe *afe)
216 struct mt8183_afe_private *afe_priv = afe->platform_priv;
231 static int apll1_mux_setting(struct mtk_base_afe *afe, bool enable)
233 struct mt8183_afe_private *afe_priv = afe->platform_priv;
239 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
246 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
255 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
262 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
271 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
281 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
305 static int apll2_mux_setting(struct mtk_base_afe *afe, bool enable)
307 struct mt8183_afe_private *afe_priv = afe->platform_priv;
313 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
320 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
329 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
336 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
345 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
355 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",
379 int mt8183_apll1_enable(struct mtk_base_afe *afe)
381 struct mt8183_afe_private *afe_priv = afe->platform_priv;
385 apll1_mux_setting(afe, true);
389 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
396 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
401 regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG,
403 regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0x1);
405 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
417 void mt8183_apll1_disable(struct mtk_base_afe *afe)
419 struct mt8183_afe_private *afe_priv = afe->platform_priv;
421 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
425 regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0x0);
430 apll1_mux_setting(afe, false);
433 int mt8183_apll2_enable(struct mtk_base_afe *afe)
435 struct mt8183_afe_private *afe_priv = afe->platform_priv;
439 apll2_mux_setting(afe, true);
443 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
450 dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",
455 regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG,
457 regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0x1);
459 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
471 void mt8183_apll2_disable(struct mtk_base_afe *afe)
473 struct mt8183_afe_private *afe_priv = afe->platform_priv;
475 regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,
479 regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0x0);
484 apll2_mux_setting(afe, false);
487 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll)
492 int mt8183_get_apll_by_rate(struct mtk_base_afe *afe, int rate)
497 int mt8183_get_apll_by_name(struct mtk_base_afe *afe, const char *name)
542 int mt8183_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate)
544 struct mt8183_afe_private *afe_priv = afe->platform_priv;
545 int apll = mt8183_get_apll_by_rate(afe, rate);
560 dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
567 dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",
577 dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
583 dev_err(afe->dev, "%s(), clk_set_rate %s, rate %d, fail %d\n",
602 void mt8183_mck_disable(struct mtk_base_afe *afe, int mck_id)
604 struct mt8183_afe_private *afe_priv = afe->platform_priv;