Lines Matching refs:i2s
67 struct img_i2s_in *i2s = dev_get_drvdata(dev);
69 clk_disable_unprepare(i2s->clk_sys);
76 struct img_i2s_in *i2s = dev_get_drvdata(dev);
79 ret = clk_prepare_enable(i2s->clk_sys);
88 static inline void img_i2s_in_writel(struct img_i2s_in *i2s, u32 val, u32 reg)
90 writel(val, i2s->base + reg);
93 static inline u32 img_i2s_in_readl(struct img_i2s_in *i2s, u32 reg)
95 return readl(i2s->base + reg);
98 static inline void img_i2s_in_ch_writel(struct img_i2s_in *i2s, u32 chan,
101 writel(val, i2s->channel_base + (chan * IMG_I2S_IN_CH_STRIDE) + reg);
104 static inline u32 img_i2s_in_ch_readl(struct img_i2s_in *i2s, u32 chan,
107 return readl(i2s->channel_base + (chan * IMG_I2S_IN_CH_STRIDE) + reg);
110 static inline void img_i2s_in_ch_disable(struct img_i2s_in *i2s, u32 chan)
114 reg = img_i2s_in_ch_readl(i2s, chan, IMG_I2S_IN_CH_CTL);
116 img_i2s_in_ch_writel(i2s, chan, reg, IMG_I2S_IN_CH_CTL);
119 static inline void img_i2s_in_ch_enable(struct img_i2s_in *i2s, u32 chan)
123 reg = img_i2s_in_ch_readl(i2s, chan, IMG_I2S_IN_CH_CTL);
125 img_i2s_in_ch_writel(i2s, chan, reg, IMG_I2S_IN_CH_CTL);
128 static inline void img_i2s_in_disable(struct img_i2s_in *i2s)
132 reg = img_i2s_in_readl(i2s, IMG_I2S_IN_CTL);
134 img_i2s_in_writel(i2s, reg, IMG_I2S_IN_CTL);
137 static inline void img_i2s_in_enable(struct img_i2s_in *i2s)
141 reg = img_i2s_in_readl(i2s, IMG_I2S_IN_CTL);
143 img_i2s_in_writel(i2s, reg, IMG_I2S_IN_CTL);
146 static inline void img_i2s_in_flush(struct img_i2s_in *i2s)
151 for (i = 0; i < i2s->active_channels; i++) {
152 reg = img_i2s_in_ch_readl(i2s, i, IMG_I2S_IN_CH_CTL);
154 img_i2s_in_ch_writel(i2s, i, reg, IMG_I2S_IN_CH_CTL);
156 img_i2s_in_ch_writel(i2s, i, reg, IMG_I2S_IN_CH_CTL);
163 struct img_i2s_in *i2s = snd_soc_dai_get_drvdata(dai);
169 img_i2s_in_enable(i2s);
175 img_i2s_in_disable(i2s);
184 static int img_i2s_in_check_rate(struct img_i2s_in *i2s,
193 cur_freq = clk_get_rate(i2s->clk_sys);
205 dev_err(i2s->dev,
217 struct img_i2s_in *i2s = snd_soc_dai_get_drvdata(dai);
252 (channels > (i2s->max_i2s_chan * 2)) ||
258 ret = img_i2s_in_check_rate(i2s, rate, frame_size,
279 reg = img_i2s_in_readl(i2s, IMG_I2S_IN_CTL);
281 img_i2s_in_writel(i2s, reg, IMG_I2S_IN_CTL);
283 for (i = 0; i < i2s->active_channels; i++)
284 img_i2s_in_ch_disable(i2s, i);
286 for (i = 0; i < i2s->max_i2s_chan; i++) {
287 reg = img_i2s_in_ch_readl(i2s, i, IMG_I2S_IN_CH_CTL);
289 img_i2s_in_ch_writel(i2s, i, reg, IMG_I2S_IN_CH_CTL);
292 i2s->active_channels = i2s_channels;
294 img_i2s_in_flush(i2s);
296 for (i = 0; i < i2s->active_channels; i++)
297 img_i2s_in_ch_enable(i2s, i);
304 struct img_i2s_in *i2s = snd_soc_dai_get_drvdata(dai);
345 ret = pm_runtime_get_sync(i2s->dev);
347 pm_runtime_put_noidle(i2s->dev);
351 for (i = 0; i < i2s->active_channels; i++)
352 img_i2s_in_ch_disable(i2s, i);
357 for (i = 0; i < i2s->max_i2s_chan; i++) {
358 reg = img_i2s_in_ch_readl(i2s, i, IMG_I2S_IN_CH_CTL);
360 img_i2s_in_ch_writel(i2s, i, reg, IMG_I2S_IN_CH_CTL);
362 img_i2s_in_ch_writel(i2s, i, reg, IMG_I2S_IN_CH_CTL);
364 img_i2s_in_ch_writel(i2s, i, reg, IMG_I2S_IN_CH_CTL);
367 for (i = 0; i < i2s->active_channels; i++)
368 img_i2s_in_ch_enable(i2s, i);
370 pm_runtime_put(i2s->dev);
383 struct img_i2s_in *i2s = snd_soc_dai_get_drvdata(dai);
385 snd_soc_dai_init_dma_data(dai, NULL, &i2s->dma_data);
391 .name = "img-i2s-in"
421 struct img_i2s_in *i2s;
429 i2s = devm_kzalloc(dev, sizeof(*i2s), GFP_KERNEL);
430 if (!i2s)
433 platform_set_drvdata(pdev, i2s);
435 i2s->dev = dev;
442 i2s->base = base;
444 if (of_property_read_u32(pdev->dev.of_node, "img,i2s-channels",
445 &i2s->max_i2s_chan)) {
446 dev_err(dev, "No img,i2s-channels property\n");
450 max_i2s_chan_pow_2 = 1 << get_count_order(i2s->max_i2s_chan);
452 i2s->channel_base = base + (max_i2s_chan_pow_2 * 0x20);
454 i2s->clk_sys = devm_clk_get(dev, "sys");
455 if (IS_ERR(i2s->clk_sys)) {
456 if (PTR_ERR(i2s->clk_sys) != -EPROBE_DEFER)
458 return PTR_ERR(i2s->clk_sys);
471 i2s->active_channels = 1;
472 i2s->dma_data.addr = res->start + IMG_I2S_IN_RX_FIFO;
473 i2s->dma_data.addr_width = 4;
475 i2s->dai_driver.probe = img_i2s_in_dai_probe;
476 i2s->dai_driver.capture.channels_min = 2;
477 i2s->dai_driver.capture.channels_max = i2s->max_i2s_chan * 2;
478 i2s->dai_driver.capture.rates = SNDRV_PCM_RATE_8000_192000;
479 i2s->dai_driver.capture.formats = SNDRV_PCM_FMTBIT_S32_LE |
481 i2s->dai_driver.ops = &img_i2s_in_dai_ops;
493 img_i2s_in_disable(i2s);
495 for (i = 0; i < i2s->max_i2s_chan; i++)
496 img_i2s_in_ch_disable(i2s, i);
502 img_i2s_in_writel(i2s, 0, IMG_I2S_IN_CTL);
504 for (i = 0; i < i2s->max_i2s_chan; i++)
505 img_i2s_in_ch_writel(i2s, i,
512 i2s->suspend_ch_ctl = devm_kcalloc(dev,
513 i2s->max_i2s_chan, sizeof(*i2s->suspend_ch_ctl), GFP_KERNEL);
514 if (!i2s->suspend_ch_ctl) {
520 &i2s->dai_driver, 1);
551 struct img_i2s_in *i2s = dev_get_drvdata(dev);
561 for (i = 0; i < i2s->max_i2s_chan; i++) {
562 reg = img_i2s_in_ch_readl(i2s, i, IMG_I2S_IN_CH_CTL);
563 i2s->suspend_ch_ctl[i] = reg;
566 i2s->suspend_ctl = img_i2s_in_readl(i2s, IMG_I2S_IN_CTL);
575 struct img_i2s_in *i2s = dev_get_drvdata(dev);
583 for (i = 0; i < i2s->max_i2s_chan; i++) {
584 reg = i2s->suspend_ch_ctl[i];
585 img_i2s_in_ch_writel(i2s, i, reg, IMG_I2S_IN_CH_CTL);
588 img_i2s_in_writel(i2s, i2s->suspend_ctl, IMG_I2S_IN_CTL);
598 { .compatible = "img,i2s-in" },
611 .name = "img-i2s-in",