Lines Matching refs:asrc
25 dev_err(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
28 dev_dbg(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
213 struct fsl_asrc *asrc = pair->asrc;
214 struct device *dev = &asrc->pdev->dev;
218 spin_lock_irqsave(&asrc->lock, lock_flags);
221 if (asrc->pair[i] != NULL)
233 } else if (asrc->channel_avail < channels) {
237 asrc->channel_avail -= channels;
238 asrc->pair[index] = pair;
243 spin_unlock_irqrestore(&asrc->lock, lock_flags);
252 * It clears the resource from asrc and releases the occupied channels.
256 struct fsl_asrc *asrc = pair->asrc;
261 regmap_update_bits(asrc->regmap, REG_ASRCTR,
264 spin_lock_irqsave(&asrc->lock, lock_flags);
266 asrc->channel_avail += pair->channels;
267 asrc->pair[index] = NULL;
270 spin_unlock_irqrestore(&asrc->lock, lock_flags);
281 struct fsl_asrc *asrc = pair->asrc;
284 regmap_update_bits(asrc->regmap, REG_ASRMCR(index),
322 struct fsl_asrc *asrc = pair->asrc;
351 regmap_write(asrc->regmap, REG_ASRIDRL(index), ratio);
352 regmap_write(asrc->regmap, REG_ASRIDRH(index), ratio >> 24);
377 struct fsl_asrc *asrc = pair->asrc;
378 struct fsl_asrc_priv *asrc_priv = asrc->private;
508 regmap_update_bits(asrc->regmap, REG_ASRCNCR,
513 regmap_update_bits(asrc->regmap, REG_ASRCTR,
515 regmap_update_bits(asrc->regmap, REG_ASRCTR,
519 regmap_update_bits(asrc->regmap, REG_ASRCSR,
529 regmap_update_bits(asrc->regmap, REG_ASRCDR(index),
535 regmap_update_bits(asrc->regmap, REG_ASRMCR1(index),
541 regmap_update_bits(asrc->regmap, REG_ASRMCR(index),
553 regmap_update_bits(asrc->regmap, REG_ASRCTR,
557 regmap_update_bits(asrc->regmap, REG_ASRCTR,
564 regmap_update_bits(asrc->regmap, REG_ASRCFG,
580 struct fsl_asrc *asrc = pair->asrc;
585 regmap_update_bits(asrc->regmap, REG_ASRCTR,
591 regmap_read(asrc->regmap, REG_ASRCFG, ®);
596 regmap_read(asrc->regmap, REG_ASRCNCR, ®);
598 regmap_write(asrc->regmap, REG_ASRDI(index), 0);
601 regmap_write(asrc->regmap, REG_ASRIER, ASRIER_AOLIE);
610 struct fsl_asrc *asrc = pair->asrc;
614 regmap_update_bits(asrc->regmap, REG_ASRCTR,
626 struct fsl_asrc *asrc = pair->asrc;
632 return dma_request_slave_channel(&asrc->pdev->dev, name);
638 struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai);
639 struct fsl_asrc_priv *asrc_priv = asrc->private;
693 struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai);
694 struct fsl_asrc_priv *asrc_priv = asrc->private;
705 dev_err(dai->dev, "fail to request asrc pair\n");
716 config.output_format = asrc->asrc_format;
718 config.output_sample_rate = asrc->asrc_rate;
720 config.input_format = asrc->asrc_format;
722 config.input_sample_rate = asrc->asrc_rate;
732 dev_err(dai->dev, "fail to config asrc pair\n");
784 struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai);
786 snd_soc_dai_init_dma_data(dai, &asrc->dma_params_tx,
787 &asrc->dma_params_rx);
965 * @asrc: ASRC context
967 static int fsl_asrc_init(struct fsl_asrc *asrc)
972 regmap_write(asrc->regmap, REG_ASRCTR, ASRCTR_ASRCEN);
975 regmap_write(asrc->regmap, REG_ASRIER, 0x0);
978 regmap_write(asrc->regmap, REG_ASRPM1, 0x7fffff);
979 regmap_write(asrc->regmap, REG_ASRPM2, 0x255555);
980 regmap_write(asrc->regmap, REG_ASRPM3, 0xff7280);
981 regmap_write(asrc->regmap, REG_ASRPM4, 0xff7280);
982 regmap_write(asrc->regmap, REG_ASRPM5, 0xff7280);
985 regmap_update_bits(asrc->regmap, REG_ASRTFR1,
993 ipg_rate = clk_get_rate(asrc->ipg_clk);
994 regmap_write(asrc->regmap, REG_ASR76K, ipg_rate / 76000);
995 return regmap_write(asrc->regmap, REG_ASR56K, ipg_rate / 56000);
1005 struct fsl_asrc *asrc = (struct fsl_asrc *)dev_id;
1006 struct device *dev = &asrc->pdev->dev;
1010 regmap_read(asrc->regmap, REG_ASRSTR, &status);
1013 regmap_write(asrc->regmap, REG_ASRSTR, ASRSTR_AOLE);
1021 if (!asrc->pair[index])
1025 asrc->pair[index]->error |= ASRC_TASK_Q_OVERLOAD;
1030 asrc->pair[index]->error |= ASRC_OUTPUT_TASK_OVERLOAD;
1035 asrc->pair[index]->error |= ASRC_INPUT_TASK_OVERLOAD;
1040 asrc->pair[index]->error |= ASRC_OUTPUT_BUFFER_OVERFLOW;
1045 asrc->pair[index]->error |= ASRC_INPUT_BUFFER_UNDERRUN;
1062 struct fsl_asrc *asrc;
1070 asrc = devm_kzalloc(&pdev->dev, sizeof(*asrc), GFP_KERNEL);
1071 if (!asrc)
1078 asrc->pdev = pdev;
1079 asrc->private = asrc_priv;
1087 asrc->paddr = res->start;
1089 asrc->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs,
1091 if (IS_ERR(asrc->regmap)) {
1093 return PTR_ERR(asrc->regmap);
1101 dev_name(&pdev->dev), asrc);
1107 asrc->mem_clk = devm_clk_get(&pdev->dev, "mem");
1108 if (IS_ERR(asrc->mem_clk)) {
1110 return PTR_ERR(asrc->mem_clk);
1113 asrc->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
1114 if (IS_ERR(asrc->ipg_clk)) {
1116 return PTR_ERR(asrc->ipg_clk);
1119 asrc->spba_clk = devm_clk_get(&pdev->dev, "spba");
1120 if (IS_ERR(asrc->spba_clk))
1138 asrc->use_edma = asrc_priv->soc->use_edma;
1139 asrc->get_dma_channel = fsl_asrc_get_dma_channel;
1140 asrc->request_pair = fsl_asrc_request_pair;
1141 asrc->release_pair = fsl_asrc_release_pair;
1142 asrc->get_fifo_addr = fsl_asrc_get_fifo_addr;
1143 asrc->pair_priv_size = sizeof(struct fsl_asrc_pair_priv);
1145 if (of_device_is_compatible(np, "fsl,imx35-asrc")) {
1148 } else if (of_device_is_compatible(np, "fsl,imx53-asrc")) {
1151 } else if (of_device_is_compatible(np, "fsl,imx8qm-asrc") ||
1152 of_device_is_compatible(np, "fsl,imx8qxp-asrc")) {
1153 ret = of_property_read_u32(np, "fsl,asrc-clk-map", &map_idx);
1163 if (of_device_is_compatible(np, "fsl,imx8qm-asrc")) {
1172 ret = fsl_asrc_init(asrc);
1174 dev_err(&pdev->dev, "failed to init asrc %d\n", ret);
1178 asrc->channel_avail = 10;
1180 ret = of_property_read_u32(np, "fsl,asrc-rate",
1181 &asrc->asrc_rate);
1187 ret = of_property_read_u32(np, "fsl,asrc-format", &asrc->asrc_format);
1189 ret = of_property_read_u32(np, "fsl,asrc-width", &width);
1197 asrc->asrc_format = SNDRV_PCM_FORMAT_S16_LE;
1200 asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE;
1205 asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE;
1210 if (!(FSL_ASRC_FORMATS & (1ULL << asrc->asrc_format))) {
1212 asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE;
1215 platform_set_drvdata(pdev, asrc);
1217 spin_lock_init(&asrc->lock);
1218 regcache_cache_only(asrc->regmap, true);
1233 struct fsl_asrc *asrc = dev_get_drvdata(dev);
1234 struct fsl_asrc_priv *asrc_priv = asrc->private;
1238 ret = clk_prepare_enable(asrc->mem_clk);
1241 ret = clk_prepare_enable(asrc->ipg_clk);
1244 if (!IS_ERR(asrc->spba_clk)) {
1245 ret = clk_prepare_enable(asrc->spba_clk);
1256 regmap_read(asrc->regmap, REG_ASRCTR, &asrctr);
1257 regmap_update_bits(asrc->regmap, REG_ASRCTR,
1261 regcache_cache_only(asrc->regmap, false);
1262 regcache_mark_dirty(asrc->regmap);
1263 regcache_sync(asrc->regmap);
1265 regmap_update_bits(asrc->regmap, REG_ASRCFG,
1270 regmap_update_bits(asrc->regmap, REG_ASRCTR,
1278 if (!IS_ERR(asrc->spba_clk))
1279 clk_disable_unprepare(asrc->spba_clk);
1281 clk_disable_unprepare(asrc->ipg_clk);
1283 clk_disable_unprepare(asrc->mem_clk);
1289 struct fsl_asrc *asrc = dev_get_drvdata(dev);
1290 struct fsl_asrc_priv *asrc_priv = asrc->private;
1293 regmap_read(asrc->regmap, REG_ASRCFG,
1296 regcache_cache_only(asrc->regmap, true);
1300 if (!IS_ERR(asrc->spba_clk))
1301 clk_disable_unprepare(asrc->spba_clk);
1302 clk_disable_unprepare(asrc->ipg_clk);
1303 clk_disable_unprepare(asrc->mem_clk);
1336 { .compatible = "fsl,imx35-asrc", .data = &fsl_asrc_imx35_data },
1337 { .compatible = "fsl,imx53-asrc", .data = &fsl_asrc_imx53_data },
1338 { .compatible = "fsl,imx8qm-asrc", .data = &fsl_asrc_imx8qm_data },
1339 { .compatible = "fsl,imx8qxp-asrc", .data = &fsl_asrc_imx8qxp_data },
1347 .name = "fsl-asrc",
1356 MODULE_ALIAS("platform:fsl-asrc");