Lines Matching refs:wm9081
3 * wm9081.c -- WM9081 ALSA SoC Audio driver
26 #include <sound/wm9081.h>
27 #include "wm9081.h"
548 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
555 if (Fref == wm9081->fll_fref && Fout == wm9081->fll_fout)
561 wm9081->fll_fref = 0;
562 wm9081->fll_fout = 0;
630 wm9081->fll_fref = Fref;
631 wm9081->fll_fout = Fout;
638 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
645 switch (wm9081->sysclk_source) {
647 if (wm9081->mclk_rate > 12225000) {
649 wm9081->sysclk_rate = wm9081->mclk_rate / 2;
651 wm9081->sysclk_rate = wm9081->mclk_rate;
664 if (wm9081->master && wm9081->bclk) {
669 target = wm9081->fs * clk_sys_rates[i].ratio;
671 if (target >= wm9081->bclk &&
679 } else if (wm9081->fs) {
682 * wm9081->fs;
695 wm9081->mclk_rate, new_sysclk);
697 wm9081->sysclk_rate = new_sysclk;
702 wm9081->sysclk_rate = wm9081->mclk_rate;
724 dev_dbg(component->dev, "CLK_SYS is %dHz\n", wm9081->sysclk_rate);
733 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
736 switch (wm9081->sysclk_source) {
738 dev_dbg(component->dev, "Using %dHz MCLK\n", wm9081->mclk_rate);
742 wm9081->mclk_rate);
818 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
837 regcache_cache_only(wm9081->regmap, false);
838 regcache_sync(wm9081->regmap);
892 regcache_cache_only(wm9081->regmap, true);
903 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
911 wm9081->master = 0;
915 wm9081->master = 1;
919 wm9081->master = 1;
923 wm9081->master = 1;
996 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1014 wm9081->fs = params_rate(params);
1016 if (wm9081->tdm_width) {
1021 wm9081->bclk = wm9081->fs * wm9081->tdm_width * slots;
1024 wm9081->bclk = 2 * wm9081->fs;
1028 wm9081->bclk *= 16;
1031 wm9081->bclk *= 20;
1035 wm9081->bclk *= 24;
1039 wm9081->bclk *= 32;
1047 dev_dbg(component->dev, "Target BCLK is %dHz\n", wm9081->bclk);
1055 best_val = abs((wm9081->sysclk_rate / clk_sys_rates[0].ratio)
1056 - wm9081->fs);
1058 cur_val = abs((wm9081->sysclk_rate /
1059 clk_sys_rates[i].ratio) - wm9081->fs);
1072 best_val = abs(wm9081->fs - sample_rates[0].rate);
1075 cur_val = abs(wm9081->fs - sample_rates[i].rate);
1090 cur_val = ((wm9081->sysclk_rate * 10) / bclk_divs[i].div)
1091 - wm9081->bclk;
1099 wm9081->bclk = (wm9081->sysclk_rate * 10) / bclk_divs[best].div;
1101 bclk_divs[best].div, wm9081->bclk);
1105 dev_dbg(component->dev, "LRCLK_RATE is %d\n", wm9081->bclk / wm9081->fs);
1106 aif4 |= wm9081->bclk / wm9081->fs;
1109 if (wm9081->pdata.num_retune_configs) {
1110 struct wm9081_pdata *pdata = &wm9081->pdata;
1115 best_val = abs(pdata->retune_configs[0].rate - wm9081->fs);
1118 wm9081->fs);
1170 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1175 wm9081->sysclk_source = clk_id;
1176 wm9081->mclk_rate = freq;
1190 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1198 wm9081->tdm_width = slot_width;
1244 .name = "wm9081-hifi",
1257 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1265 if (!wm9081->pdata.num_retune_configs) {
1305 struct wm9081_priv *wm9081;
1309 wm9081 = devm_kzalloc(&i2c->dev, sizeof(struct wm9081_priv),
1311 if (wm9081 == NULL)
1314 i2c_set_clientdata(i2c, wm9081);
1316 wm9081->regmap = devm_regmap_init_i2c(i2c, &wm9081_regmap);
1317 if (IS_ERR(wm9081->regmap)) {
1318 ret = PTR_ERR(wm9081->regmap);
1323 ret = regmap_read(wm9081->regmap, WM9081_SOFTWARE_RESET, ®);
1333 ret = wm9081_reset(wm9081->regmap);
1340 memcpy(&wm9081->pdata, dev_get_platdata(&i2c->dev),
1341 sizeof(wm9081->pdata));
1344 if (wm9081->pdata.irq_high)
1346 if (!wm9081->pdata.irq_cmos)
1348 regmap_update_bits(wm9081->regmap, WM9081_INTERRUPT_CONTROL,
1351 regcache_cache_only(wm9081->regmap, true);
1367 { "wm9081", 0 },
1374 .name = "wm9081",