Lines Matching refs:bclk
151 int bclk;
664 if (wm9081->master && wm9081->bclk) {
671 if (target >= wm9081->bclk &&
1021 wm9081->bclk = wm9081->fs * wm9081->tdm_width * slots;
1024 wm9081->bclk = 2 * wm9081->fs;
1028 wm9081->bclk *= 16;
1031 wm9081->bclk *= 20;
1035 wm9081->bclk *= 24;
1039 wm9081->bclk *= 32;
1047 dev_dbg(component->dev, "Target BCLK is %dHz\n", wm9081->bclk);
1091 - wm9081->bclk;
1099 wm9081->bclk = (wm9081->sysclk_rate * 10) / bclk_divs[best].div;
1101 bclk_divs[best].div, wm9081->bclk);
1105 dev_dbg(component->dev, "LRCLK_RATE is %d\n", wm9081->bclk / wm9081->fs);
1106 aif4 |= wm9081->bclk / wm9081->fs;