Lines Matching refs:dai
560 static int wm8983_dac_mute(struct snd_soc_dai *dai, int mute, int direction)
562 struct snd_soc_component *component = dai->component;
569 static int wm8983_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
571 struct snd_soc_component *component = dai->component;
589 dev_err(dai->dev, "Unknown dai format\n");
604 dev_err(dai->dev, "Unknown master/slave configuration\n");
615 dev_err(dai->dev, "DSP A/B modes are not supported\n");
635 dev_err(dai->dev, "Unknown polarity configuration\n");
648 struct snd_soc_dai *dai)
651 struct snd_soc_component *component = dai->component;
680 dev_err(dai->dev, "Unsupported word length %u\n",
701 dev_dbg(dai->dev, "Selected SRATE = %d\n", srates[srate_idx]);
705 dev_dbg(dai->dev, "Target BCLK = %uHz\n", wm8983->bclk);
706 dev_dbg(dai->dev, "SYSCLK = %uHz\n", wm8983->sysclk);
715 dev_err(dai->dev, "Unable to configure MCLK ratio %u/%u\n",
720 dev_dbg(dai->dev, "MCLK ratio = %dfs\n", fs_ratios[i].ratio);
732 dev_err(dai->dev, "No matching BCLK divider found\n");
736 dev_dbg(dai->dev, "BCLK div = %d\n", i);
784 static int wm8983_set_pll(struct snd_soc_dai *dai, int pll_id,
792 component = dai->component;
823 static int wm8983_set_sysclk(struct snd_soc_dai *dai,
826 struct snd_soc_component *component = dai->component;
839 dev_err(dai->dev, "Unknown clock source: %d\n", clk_id);