Lines Matching defs:wm8962
3 * wm8962.c -- WM8962 ALSA SoC Audio driver
33 #include <sound/wm8962.h>
36 #include "wm8962.h"
95 struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \
98 regcache_mark_dirty(wm8962->regmap); \
1439 static int wm8962_reset(struct wm8962_priv *wm8962)
1443 ret = regmap_write(wm8962->regmap, WM8962_SOFTWARE_RESET, 0x6243);
1447 return regmap_write(wm8962->regmap, WM8962_PLL_SOFTWARE_RESET, 0);
1474 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1476 return regcache_sync_region(wm8962->regmap,
1505 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1511 wm8962_dsp2_set_enable(component, wm8962->dsp2_ena);
1548 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1550 ucontrol->value.integer.value[0] = !!(wm8962->dsp2_ena & 1 << shift);
1560 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1561 int old = wm8962->dsp2_ena;
1566 mutex_lock(&wm8962->dsp2_ena_lock);
1569 wm8962->dsp2_ena |= 1 << shift;
1571 wm8962->dsp2_ena &= ~(1 << shift);
1573 if (wm8962->dsp2_ena == old)
1579 if (wm8962->dsp2_ena)
1580 wm8962_dsp2_set_enable(component, wm8962->dsp2_ena);
1586 mutex_unlock(&wm8962->dsp2_ena_lock);
2034 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2038 if (wm8962->dsp2_ena)
2043 if (wm8962->dsp2_ena)
2401 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2402 struct wm8962_pdata *pdata = &wm8962->pdata;
2450 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2456 if (!wm8962->sysclk_rate) {
2461 if (!wm8962->bclk || !wm8962->lrclk) {
2467 if (sysclk_rates[i] == wm8962->sysclk_rate / wm8962->lrclk) {
2475 wm8962->sysclk_rate / wm8962->lrclk);
2514 dspclk = wm8962->sysclk_rate;
2517 dspclk = wm8962->sysclk_rate / 2;
2520 dspclk = wm8962->sysclk_rate / 4;
2524 dspclk = wm8962->sysclk_rate;
2527 dev_dbg(component->dev, "DSPCLK is %dHz, BCLK %d\n", dspclk, wm8962->bclk);
2534 if (dspclk / bclk_divs[i] == wm8962->bclk) {
2536 bclk_divs[i], wm8962->bclk);
2543 dspclk / wm8962->bclk);
2547 aif2 |= wm8962->bclk / wm8962->lrclk;
2549 wm8962->bclk / wm8962->lrclk, wm8962->lrclk);
2610 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2615 wm8962->bclk = snd_soc_params_to_bclk(params);
2617 wm8962->bclk *= 2;
2619 wm8962->lrclk = params_rate(params);
2622 if (sr_vals[i].rate == wm8962->lrclk) {
2628 dev_err(component->dev, "Unsupported rate %dHz\n", wm8962->lrclk);
2632 if (wm8962->lrclk % 8000 == 0)
2658 wm8962->bclk, wm8962->lrclk);
2670 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2675 wm8962->sysclk = WM8962_SYSCLK_MCLK;
2679 wm8962->sysclk = WM8962_SYSCLK_FLL;
2689 wm8962->sysclk_rate = freq;
2866 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2873 if (source == wm8962->fll_src && Fref == wm8962->fll_fref &&
2874 Fout == wm8962->fll_fout)
2880 wm8962->fll_fref = 0;
2881 wm8962->fll_fout = 0;
2934 reinit_completion(&wm8962->fll_lock);
2952 if (wm8962->irq)
2957 timeout = wait_for_completion_timeout(&wm8962->fll_lock,
2960 if (timeout == 0 && wm8962->irq) {
2968 wm8962->fll_fref = Fref;
2969 wm8962->fll_fout = Fout;
2970 wm8962->fll_src = source;
3013 .name = "wm8962",
3034 struct wm8962_priv *wm8962 = container_of(work,
3037 struct snd_soc_component *component = wm8962->component;
3054 snd_soc_jack_report(wm8962->jack, status,
3065 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3077 ret = regmap_read(wm8962->regmap, WM8962_INTERRUPT_STATUS_2_MASK,
3086 ret = regmap_read(wm8962->regmap, WM8962_INTERRUPT_STATUS_2, &active);
3101 ret = regmap_write(wm8962->regmap, WM8962_INTERRUPT_STATUS_2, active);
3107 complete(&wm8962->fll_lock);
3116 ret = regmap_read(wm8962->regmap,
3144 &wm8962->mic_work,
3168 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3172 wm8962->jack = jack;
3187 snd_soc_jack_report(wm8962->jack, 0,
3212 struct wm8962_priv *wm8962 =
3214 struct snd_soc_component *component = wm8962->component;
3220 if (wm8962->beep_rate) {
3222 if (abs(wm8962->beep_rate - beep_rates[i]) <
3223 abs(wm8962->beep_rate - beep_rates[best]))
3228 beep_rates[best], wm8962->beep_rate);
3251 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3266 wm8962->beep_rate = hz;
3267 schedule_work(&wm8962->beep_work);
3275 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3283 input_event(wm8962->beep, EV_SND, SND_TONE, time);
3292 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3295 wm8962->beep = devm_input_allocate_device(component->dev);
3296 if (!wm8962->beep) {
3301 INIT_WORK(&wm8962->beep_work, wm8962_beep_work);
3302 wm8962->beep_rate = 0;
3304 wm8962->beep->name = "WM8962 Beep Generator";
3305 wm8962->beep->phys = dev_name(component->dev);
3306 wm8962->beep->id.bustype = BUS_I2C;
3308 wm8962->beep->evbit[0] = BIT_MASK(EV_SND);
3309 wm8962->beep->sndbit[0] = BIT_MASK(SND_BELL) | BIT_MASK(SND_TONE);
3310 wm8962->beep->event = wm8962_beep_event;
3311 wm8962->beep->dev.parent = component->dev;
3312 input_set_drvdata(wm8962->beep, component);
3314 ret = input_register_device(wm8962->beep);
3316 wm8962->beep = NULL;
3329 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3332 cancel_work_sync(&wm8962->beep_work);
3333 wm8962->beep = NULL;
3338 static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio)
3359 regmap_update_bits(wm8962->regmap, WM8962_ANALOGUE_CLOCKING1,
3366 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3382 wm8962_set_gpio_mode(wm8962, offset + 1);
3389 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3390 struct snd_soc_component *component = wm8962->component;
3399 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3400 struct snd_soc_component *component = wm8962->component;
3415 .label = "wm8962",
3425 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3426 struct wm8962_pdata *pdata = &wm8962->pdata;
3429 wm8962->gpio_chip = wm8962_template_chip;
3430 wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO;
3431 wm8962->gpio_chip.parent = component->dev;
3434 wm8962->gpio_chip.base = pdata->gpio_base;
3436 wm8962->gpio_chip.base = -1;
3438 ret = gpiochip_add_data(&wm8962->gpio_chip, wm8962);
3445 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3447 gpiochip_remove(&wm8962->gpio_chip);
3463 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3467 wm8962->component = component;
3469 wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0;
3470 wm8962->disable_nb[1].notifier_call = wm8962_regulator_event_1;
3471 wm8962->disable_nb[2].notifier_call = wm8962_regulator_event_2;
3472 wm8962->disable_nb[3].notifier_call = wm8962_regulator_event_3;
3473 wm8962->disable_nb[4].notifier_call = wm8962_regulator_event_4;
3474 wm8962->disable_nb[5].notifier_call = wm8962_regulator_event_5;
3475 wm8962->disable_nb[6].notifier_call = wm8962_regulator_event_6;
3476 wm8962->disable_nb[7].notifier_call = wm8962_regulator_event_7;
3479 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) {
3481 wm8962->supplies[i].consumer,
3482 &wm8962->disable_nb[i]);
3529 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3531 cancel_delayed_work_sync(&wm8962->mic_work);
3600 struct wm8962_priv *wm8962;
3604 wm8962 = devm_kzalloc(&i2c->dev, sizeof(*wm8962), GFP_KERNEL);
3605 if (wm8962 == NULL)
3608 mutex_init(&wm8962->dsp2_ena_lock);
3610 i2c_set_clientdata(i2c, wm8962);
3612 INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work);
3613 init_completion(&wm8962->fll_lock);
3614 wm8962->irq = i2c->irq;
3618 memcpy(&wm8962->pdata, pdata, sizeof(struct wm8962_pdata));
3620 ret = wm8962_set_pdata_from_of(i2c, &wm8962->pdata);
3626 if (IS_ERR(wm8962->pdata.mclk)) {
3628 if (PTR_ERR(wm8962->pdata.mclk) == -EPROBE_DEFER)
3630 wm8962->pdata.mclk = NULL;
3633 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
3634 wm8962->supplies[i].supply = wm8962_supply_names[i];
3636 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8962->supplies),
3637 wm8962->supplies);
3643 ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
3644 wm8962->supplies);
3650 wm8962->regmap = devm_regmap_init_i2c(i2c, &wm8962_regmap);
3651 if (IS_ERR(wm8962->regmap)) {
3652 ret = PTR_ERR(wm8962->regmap);
3662 regcache_cache_bypass(wm8962->regmap, true);
3664 ret = regmap_read(wm8962->regmap, WM8962_SOFTWARE_RESET, ®);
3676 ret = regmap_read(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME, ®);
3688 regcache_cache_bypass(wm8962->regmap, false);
3690 ret = wm8962_reset(wm8962);
3699 regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
3703 regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
3707 regmap_update_bits(wm8962->regmap, WM8962_PLL2,
3712 for (i = 0; i < ARRAY_SIZE(wm8962->pdata.gpio_init); i++)
3713 if (wm8962->pdata.gpio_init[i]) {
3714 wm8962_set_gpio_mode(wm8962, i + 1);
3715 regmap_write(wm8962->regmap, 0x200 + i,
3716 wm8962->pdata.gpio_init[i] & 0xffff);
3721 if (wm8962->pdata.spk_mono)
3722 regmap_update_bits(wm8962->regmap, WM8962_CLASS_D_CONTROL_2,
3727 if (wm8962->pdata.mic_cfg)
3728 regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4,
3733 wm8962->pdata.mic_cfg);
3736 regmap_update_bits(wm8962->regmap, WM8962_LEFT_INPUT_VOLUME,
3738 regmap_update_bits(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME,
3740 regmap_update_bits(wm8962->regmap, WM8962_LEFT_ADC_VOLUME,
3742 regmap_update_bits(wm8962->regmap, WM8962_RIGHT_ADC_VOLUME,
3744 regmap_update_bits(wm8962->regmap, WM8962_LEFT_DAC_VOLUME,
3746 regmap_update_bits(wm8962->regmap, WM8962_RIGHT_DAC_VOLUME,
3748 regmap_update_bits(wm8962->regmap, WM8962_SPKOUTL_VOLUME,
3750 regmap_update_bits(wm8962->regmap, WM8962_SPKOUTR_VOLUME,
3752 regmap_update_bits(wm8962->regmap, WM8962_HPOUTL_VOLUME,
3754 regmap_update_bits(wm8962->regmap, WM8962_HPOUTR_VOLUME,
3758 regmap_update_bits(wm8962->regmap, WM8962_EQ1,
3762 regmap_update_bits(wm8962->regmap, WM8962_IRQ_DEBOUNCE,
3767 if (wm8962->pdata.in4_dc_measure) {
3768 ret = regmap_register_patch(wm8962->regmap,
3777 if (wm8962->irq) {
3778 if (wm8962->pdata.irq_active_low) {
3786 regmap_update_bits(wm8962->regmap, WM8962_INTERRUPT_CONTROL,
3789 ret = devm_request_threaded_irq(&i2c->dev, wm8962->irq, NULL,
3792 "wm8962", &i2c->dev);
3795 wm8962->irq, ret);
3796 wm8962->irq = 0;
3800 regmap_update_bits(wm8962->regmap,
3816 regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4,
3818 regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4,
3821 regcache_cache_only(wm8962->regmap, true);
3824 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3831 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3845 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3848 ret = clk_prepare_enable(wm8962->pdata.mclk);
3854 ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
3855 wm8962->supplies);
3861 regcache_cache_only(wm8962->regmap, false);
3863 wm8962_reset(wm8962);
3865 regcache_mark_dirty(wm8962->regmap);
3870 regmap_write_bits(wm8962->regmap, WM8962_CLOCKING2,
3874 regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
3878 regmap_update_bits(wm8962->regmap, WM8962_PLL2,
3882 regcache_sync(wm8962->regmap);
3884 regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
3889 regmap_update_bits(wm8962->regmap, WM8962_PWR_MGMT_1,
3898 clk_disable_unprepare(wm8962->pdata.mclk);
3904 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3906 regmap_update_bits(wm8962->regmap, WM8962_PWR_MGMT_1,
3909 regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
3913 regcache_cache_only(wm8962->regmap, true);
3915 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies),
3916 wm8962->supplies);
3918 clk_disable_unprepare(wm8962->pdata.mclk);
3930 { "wm8962", 0 },
3936 { .compatible = "wlf,wm8962", },
3943 .name = "wm8962",