Lines Matching refs:dec_cfg_reg
4190 u16 tx_vol_ctl_reg, pwr_level_reg = 0, dec_cfg_reg, hpf_gate_reg;
4227 dec_cfg_reg = WCD934X_CDC_TX0_TX_PATH_CFG0 + 16 * decimator;
4244 snd_soc_component_update_bits(comp, dec_cfg_reg,
4249 snd_soc_component_update_bits(comp, dec_cfg_reg,
4256 snd_soc_component_update_bits(comp, dec_cfg_reg,
4263 hpf_coff_freq = (snd_soc_component_read(comp, dec_cfg_reg) &
4266 snd_soc_component_update_bits(comp, dec_cfg_reg,
4287 hpf_coff_freq = (snd_soc_component_read(comp, dec_cfg_reg) &
4291 snd_soc_component_update_bits(comp, dec_cfg_reg,
4310 snd_soc_component_update_bits(comp, dec_cfg_reg,