Lines Matching defs:val
1299 int val;
1302 &val);
1305 if (val & WCD934X_CDC_SWR_CLK_EN_MASK)
1376 int rc, val;
1396 WCD934X_CHIP_TIER_CTRL_EFUSE_STATUS, &val);
1397 if (rc || (!(val & 0x01)))
1398 WARN(1, "%s: Efuse sense is not complete val=%x, ret=%d\n",
1399 __func__, val, rc);
1485 int val, j;
1492 val = snd_soc_component_read(component,
1496 if (val == (ch->shift + INTn_2_INP_SEL_RX0)) {
2048 int ret, val;
2050 regmap_read(wcd->regmap, WCD934X_CDC_CLK_RST_CTRL_SWR_CONTROL, &val);
2051 ret = val & WCD934X_CDC_SWR_CLK_EN_MASK;
2192 unsigned int val, int_val = 0;
2199 regmap_read(wcd->if_regmap, i, &val);
2200 status |= ((u32)val << (8 * j));
2213 WCD934X_SLIM_PGD_PORT_INT_RX_SOURCE0 + j, &val);
2214 if (val) {
2224 if (val & WCD934X_SLIM_IRQ_OVERFLOW)
2227 (tx ? "TX" : "RX"), port_id, val);
2229 if (val & WCD934X_SLIM_IRQ_UNDERFLOW)
2232 (tx ? "TX" : "RX"), port_id, val);
2234 if ((val & WCD934X_SLIM_IRQ_OVERFLOW) ||
2235 (val & WCD934X_SLIM_IRQ_UNDERFLOW)) {
2251 if (val & WCD934X_SLIM_IRQ_PORT_CLOSED)
2254 (tx ? "TX" : "RX"), port_id, val);
2302 int val = WCD934X_CODEC_RPM_CLK_MCLK_CFG_9P6MHZ;
2307 val = WCD934X_CODEC_RPM_CLK_MCLK_CFG_12P288MHZ;
2311 val);
2619 int reg, val, ret;
2622 val = ucontrol->value.enumerated.item[0];
2633 if (val)
2652 unsigned int val;
2658 val = ucontrol->value.enumerated.item[0];
2659 if (val > e->items - 1)
2696 mic_sel = val ? 0x0 : 0x1;
3352 unsigned int val = 0;
3365 regmap_read(wcd->if_regmap, reg, &val);
3366 if (!(val & BIT(port_num % 8)))
3368 val | BIT(port_num % 8));
3566 int val = 0;
3582 val = snd_soc_component_read(comp, gain_reg);
3583 val += offset_val;
3584 snd_soc_component_write(comp, gain_reg, val);
4324 u8 val;
4330 val = set ? mask : 0x00;
4336 mask, val);
4341 mask, val);