Lines Matching defs:clk_ctl
895 int clk_ctl = 0;
920 clk_ctl |= SGTL5000_RATE_MODE_DIV_4 << SGTL5000_RATE_MODE_SHIFT;
923 clk_ctl |= SGTL5000_RATE_MODE_DIV_2 << SGTL5000_RATE_MODE_SHIFT;
926 clk_ctl |= SGTL5000_RATE_MODE_DIV_1 << SGTL5000_RATE_MODE_SHIFT;
935 clk_ctl |= SGTL5000_SYS_FS_32k << SGTL5000_SYS_FS_SHIFT;
938 clk_ctl |= SGTL5000_SYS_FS_44_1k << SGTL5000_SYS_FS_SHIFT;
941 clk_ctl |= SGTL5000_SYS_FS_48k << SGTL5000_SYS_FS_SHIFT;
944 clk_ctl |= SGTL5000_SYS_FS_96k << SGTL5000_SYS_FS_SHIFT;
959 clk_ctl |= SGTL5000_MCLK_FREQ_256FS <<
963 clk_ctl |= SGTL5000_MCLK_FREQ_384FS <<
967 clk_ctl |= SGTL5000_MCLK_FREQ_512FS <<
973 clk_ctl |= SGTL5000_MCLK_FREQ_PLL <<
986 if ((clk_ctl & SGTL5000_MCLK_FREQ_MASK) == SGTL5000_MCLK_FREQ_PLL) {
1029 snd_soc_component_write(component, SGTL5000_CHIP_CLK_CTRL, clk_ctl);
1032 snd_soc_component_write(component, SGTL5000_CHIP_CLK_CTRL, clk_ctl);