Lines Matching refs:lrck
1264 ref = 256 * rt5682->lrck[RT5682_AIF2];
1266 ref = 256 * rt5682->lrck[RT5682_AIF1];
2076 rt5682->lrck[dai->id] = params_rate(params);
2077 pre_div = rl6231_get_clk_info(rt5682->sysclk, rt5682->lrck[dai->id]);
2086 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
2087 rt5682->lrck[dai->id], pre_div, dai->id);
2601 if (rt5682->lrck[RT5682_AIF1] != CLK_48 &&
2602 rt5682->lrck[RT5682_AIF1] != CLK_44) {
2608 return rt5682->lrck[RT5682_AIF1];
2678 rt5682->lrck[RT5682_AIF1] = rate;
2900 rt5682->lrck[RT5682_AIF1] = CLK_48;