Lines Matching refs:rt5665
3 * rt5665.c -- RT5665/RT5658 ALSA SoC audio codec driver
30 #include <sound/rt5665.h>
33 #include "rt5665.h"
1169 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
1177 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2, 0x100,
1180 regmap_read(rt5665->regmap, RT5665_GPIO_STA, &val);
1182 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1,
1185 regmap_read(rt5665->regmap, RT5665_GPIO_STA, &val);
1188 regmap_read(rt5665->regmap, RT5665_GPIO_STA,
1193 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1,
1195 regmap_write(rt5665->regmap, RT5665_EJD_CTRL_3, 0x3424);
1196 regmap_write(rt5665->regmap, RT5665_IL_CMD_1, 0x0048);
1197 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1, 0xa291);
1201 rt5665->sar_adc_value = snd_soc_component_read(rt5665->component,
1204 sar_hs_type = rt5665->pdata.sar_hs_type ?
1205 rt5665->pdata.sar_hs_type : 729;
1207 if (rt5665->sar_adc_value > sar_hs_type) {
1208 rt5665->jack_type = SND_JACK_HEADSET;
1211 rt5665->jack_type = SND_JACK_HEADPHONE;
1212 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1,
1214 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2,
1220 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1, 0x2291);
1221 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2, 0x100, 0);
1224 if (rt5665->jack_type == SND_JACK_HEADSET)
1226 rt5665->jack_type = 0;
1229 dev_dbg(component->dev, "jack_type = %d\n", rt5665->jack_type);
1230 return rt5665->jack_type;
1235 struct rt5665_priv *rt5665 = data;
1238 &rt5665->jack_detect_work, msecs_to_jiffies(250));
1245 struct rt5665_priv *rt5665 = container_of(work, struct rt5665_priv,
1248 if (snd_soc_component_read(rt5665->component, RT5665_AJD1_CTRL) & 0x0010) {
1250 rt5665->jack_type = rt5665_headset_detect(rt5665->component, 0);
1252 snd_soc_jack_report(rt5665->hs_jack, rt5665->jack_type,
1257 schedule_delayed_work(&rt5665->jd_check_work, 500);
1264 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
1266 switch (rt5665->pdata.jd_src) {
1268 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
1270 regmap_update_bits(rt5665->regmap, RT5665_RC_CLK_CTRL,
1272 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_2,
1274 regmap_update_bits(rt5665->regmap, RT5665_IRQ_CTRL_1, 0x8, 0x8);
1285 rt5665->hs_jack = hs_jack;
1292 struct rt5665_priv *rt5665 =
1296 while (!rt5665->component) {
1301 while (!rt5665->component->card->instantiated) {
1306 while (!rt5665->calibration_done) {
1311 mutex_lock(&rt5665->calibrate_mutex);
1313 val = snd_soc_component_read(rt5665->component, RT5665_AJD1_CTRL) & 0x0010;
1316 if (rt5665->jack_type == 0) {
1318 rt5665->jack_type =
1319 rt5665_headset_detect(rt5665->component, 1);
1322 rt5665->jack_type = SND_JACK_HEADSET;
1323 btn_type = rt5665_button_detect(rt5665->component);
1325 * rt5665 can report three kinds of button behavior,
1335 rt5665->jack_type |= SND_JACK_BTN_0;
1340 rt5665->jack_type |= SND_JACK_BTN_1;
1345 rt5665->jack_type |= SND_JACK_BTN_2;
1350 rt5665->jack_type |= SND_JACK_BTN_3;
1356 dev_err(rt5665->component->dev,
1364 rt5665->jack_type = rt5665_headset_detect(rt5665->component, 0);
1367 snd_soc_jack_report(rt5665->hs_jack, rt5665->jack_type,
1372 if (rt5665->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1374 schedule_delayed_work(&rt5665->jd_check_work, 0);
1376 cancel_delayed_work_sync(&rt5665->jd_check_work);
1378 mutex_unlock(&rt5665->calibrate_mutex);
1480 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
1483 pd = rl6231_get_pre_div(rt5665->regmap,
1485 idx = rl6231_calc_dmic_clk(rt5665->sysclk / pd);
4109 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4113 rt5665->lrck[dai->id] = params_rate(params);
4114 pre_div = rl6231_get_clk_info(rt5665->sysclk, rt5665->lrck[dai->id]);
4118 rt5665->sysclk, rt5665->lrck[dai->id] * 512);
4120 rt5665->lrck[dai->id] * 512, 0);
4130 rt5665->lrck[dai->id], pre_div, dai->id);
4186 switch (rt5665->lrck[dai->id]) {
4204 if (rt5665->master[RT5665_AIF2_1] || rt5665->master[RT5665_AIF2_2]) {
4208 if (rt5665->master[RT5665_AIF3]) {
4219 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4224 rt5665->master[dai->id] = 1;
4228 rt5665->master[dai->id] = 0;
4288 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4291 if (freq == rt5665->sysclk && clk_id == rt5665->sysclk_src)
4314 if (rt5665->master[RT5665_AIF2_1] || rt5665->master[RT5665_AIF2_2]) {
4318 if (rt5665->master[RT5665_AIF3]) {
4323 rt5665->sysclk = freq;
4324 rt5665->sysclk_src = clk_id;
4335 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4339 if (source == rt5665->pll_src && freq_in == rt5665->pll_in &&
4340 freq_out == rt5665->pll_out)
4346 rt5665->pll_in = 0;
4347 rt5665->pll_out = 0;
4391 rt5665->pll_in = freq_in;
4392 rt5665->pll_out = freq_out;
4393 rt5665->pll_src = source;
4401 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4405 rt5665->bclk[dai->id] = ratio;
4429 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4433 regmap_update_bits(rt5665->regmap, RT5665_DIG_MISC,
4438 regmap_update_bits(rt5665->regmap, RT5665_PWR_DIG_1,
4440 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1,
4442 regmap_update_bits(rt5665->regmap, RT5665_DIG_MISC,
4446 regmap_update_bits(rt5665->regmap, RT5665_PWR_DIG_1,
4448 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1,
4461 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4463 rt5665->component = component;
4465 schedule_delayed_work(&rt5665->calibrate_work, msecs_to_jiffies(100));
4472 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4474 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4476 regulator_bulk_disable(ARRAY_SIZE(rt5665->supplies), rt5665->supplies);
4482 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4484 regcache_cache_only(rt5665->regmap, true);
4485 regcache_mark_dirty(rt5665->regmap);
4491 struct rt5665_priv *rt5665 = snd_soc_component_get_drvdata(component);
4493 regcache_cache_only(rt5665->regmap, false);
4494 regcache_sync(rt5665->regmap);
4516 .name = "rt5665-aif1_1",
4535 .name = "rt5665-aif1_2",
4547 .name = "rt5665-aif2_1",
4566 .name = "rt5665-aif2_2",
4585 .name = "rt5665-aif3",
4640 {"rt5665", 0},
4645 static int rt5665_parse_dt(struct rt5665_priv *rt5665, struct device *dev)
4647 rt5665->pdata.in1_diff = of_property_read_bool(dev->of_node,
4649 rt5665->pdata.in2_diff = of_property_read_bool(dev->of_node,
4651 rt5665->pdata.in3_diff = of_property_read_bool(dev->of_node,
4653 rt5665->pdata.in4_diff = of_property_read_bool(dev->of_node,
4657 &rt5665->pdata.dmic1_data_pin);
4659 &rt5665->pdata.dmic2_data_pin);
4661 &rt5665->pdata.jd_src);
4663 rt5665->pdata.ldo1_en = of_get_named_gpio(dev->of_node,
4669 static void rt5665_calibrate(struct rt5665_priv *rt5665)
4673 mutex_lock(&rt5665->calibrate_mutex);
4675 regcache_cache_bypass(rt5665->regmap, true);
4677 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4678 regmap_write(rt5665->regmap, RT5665_BIAS_CUR_CTRL_8, 0xa602);
4679 regmap_write(rt5665->regmap, RT5665_HP_CHARGE_PUMP_1, 0x0c26);
4680 regmap_write(rt5665->regmap, RT5665_MONOMIX_IN_GAIN, 0x021f);
4681 regmap_write(rt5665->regmap, RT5665_MONO_OUT, 0x480a);
4682 regmap_write(rt5665->regmap, RT5665_PWR_MIXER, 0x083f);
4683 regmap_write(rt5665->regmap, RT5665_PWR_DIG_1, 0x0180);
4684 regmap_write(rt5665->regmap, RT5665_EJD_CTRL_1, 0x4040);
4685 regmap_write(rt5665->regmap, RT5665_HP_LOGIC_CTRL_2, 0x0000);
4686 regmap_write(rt5665->regmap, RT5665_DIG_MISC, 0x0001);
4687 regmap_write(rt5665->regmap, RT5665_MICBIAS_2, 0x0380);
4688 regmap_write(rt5665->regmap, RT5665_GLB_CLK, 0x8000);
4689 regmap_write(rt5665->regmap, RT5665_ADDA_CLK_1, 0x1000);
4690 regmap_write(rt5665->regmap, RT5665_CHOP_DAC, 0x3030);
4691 regmap_write(rt5665->regmap, RT5665_CALIB_ADC_CTRL, 0x3c05);
4692 regmap_write(rt5665->regmap, RT5665_PWR_ANLG_1, 0xaa3e);
4694 regmap_write(rt5665->regmap, RT5665_PWR_ANLG_1, 0xfe7e);
4695 regmap_write(rt5665->regmap, RT5665_HP_CALIB_CTRL_2, 0x0321);
4697 regmap_write(rt5665->regmap, RT5665_HP_CALIB_CTRL_1, 0xfc00);
4700 regmap_read(rt5665->regmap, RT5665_HP_CALIB_STA_1, &value);
4708 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4709 regcache_cache_bypass(rt5665->regmap, false);
4716 regmap_write(rt5665->regmap, RT5665_MONO_AMP_CALIB_CTRL_1, 0x9e24);
4719 regmap_read(rt5665->regmap, RT5665_MONO_AMP_CALIB_STA1, &value);
4727 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4728 regcache_cache_bypass(rt5665->regmap, false);
4735 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4736 regcache_cache_bypass(rt5665->regmap, false);
4738 regcache_mark_dirty(rt5665->regmap);
4739 regcache_sync(rt5665->regmap);
4741 regmap_write(rt5665->regmap, RT5665_BIAS_CUR_CTRL_8, 0xa602);
4742 regmap_write(rt5665->regmap, RT5665_ASRC_8, 0x0120);
4745 rt5665->calibration_done = true;
4746 mutex_unlock(&rt5665->calibrate_mutex);
4751 struct rt5665_priv *rt5665 = container_of(work, struct rt5665_priv,
4754 while (!rt5665->component->card->instantiated) {
4759 rt5665_calibrate(rt5665);
4766 struct rt5665_priv *rt5665;
4770 rt5665 = devm_kzalloc(&i2c->dev, sizeof(struct rt5665_priv),
4773 if (rt5665 == NULL)
4776 i2c_set_clientdata(i2c, rt5665);
4779 rt5665->pdata = *pdata;
4781 rt5665_parse_dt(rt5665, &i2c->dev);
4783 for (i = 0; i < ARRAY_SIZE(rt5665->supplies); i++)
4784 rt5665->supplies[i].supply = rt5665_supply_names[i];
4786 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5665->supplies),
4787 rt5665->supplies);
4793 ret = regulator_bulk_enable(ARRAY_SIZE(rt5665->supplies),
4794 rt5665->supplies);
4800 if (gpio_is_valid(rt5665->pdata.ldo1_en)) {
4801 if (devm_gpio_request_one(&i2c->dev, rt5665->pdata.ldo1_en,
4802 GPIOF_OUT_INIT_HIGH, "rt5665"))
4809 rt5665->regmap = devm_regmap_init_i2c(i2c, &rt5665_regmap);
4810 if (IS_ERR(rt5665->regmap)) {
4811 ret = PTR_ERR(rt5665->regmap);
4817 regmap_read(rt5665->regmap, RT5665_DEVICE_ID, &val);
4820 "Device with ID register %x is not rt5665\n", val);
4824 regmap_read(rt5665->regmap, RT5665_RESET, &val);
4827 rt5665->id = CODEC_5666;
4831 rt5665->id = CODEC_5665;
4835 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4838 if (rt5665->pdata.in1_diff)
4839 regmap_update_bits(rt5665->regmap, RT5665_IN1_IN2,
4841 if (rt5665->pdata.in2_diff)
4842 regmap_update_bits(rt5665->regmap, RT5665_IN1_IN2,
4844 if (rt5665->pdata.in3_diff)
4845 regmap_update_bits(rt5665->regmap, RT5665_IN3_IN4,
4847 if (rt5665->pdata.in4_diff)
4848 regmap_update_bits(rt5665->regmap, RT5665_IN3_IN4,
4852 if (rt5665->pdata.dmic1_data_pin != RT5665_DMIC1_NULL ||
4853 rt5665->pdata.dmic2_data_pin != RT5665_DMIC2_NULL) {
4854 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_2,
4856 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
4858 switch (rt5665->pdata.dmic1_data_pin) {
4860 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1,
4865 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1,
4867 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
4876 switch (rt5665->pdata.dmic2_data_pin) {
4878 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1,
4883 regmap_update_bits(rt5665->regmap,
4887 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
4898 regmap_write(rt5665->regmap, RT5665_HP_LOGIC_CTRL_2, 0x0002);
4899 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1,
4902 regmap_update_bits(rt5665->regmap, RT5665_STO1_DAC_SIL_DET,
4905 regmap_update_bits(rt5665->regmap, RT5665_HP_CHARGE_PUMP_1,
4909 if (rt5665->id == CODEC_5666) {
4910 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_2,
4912 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_3,
4917 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1,
4921 INIT_DELAYED_WORK(&rt5665->jack_detect_work,
4923 INIT_DELAYED_WORK(&rt5665->calibrate_work,
4925 INIT_DELAYED_WORK(&rt5665->jd_check_work,
4928 mutex_init(&rt5665->calibrate_mutex);
4933 | IRQF_ONESHOT, "rt5665", rt5665);
4946 struct rt5665_priv *rt5665 = i2c_get_clientdata(client);
4948 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4953 {.compatible = "realtek,rt5665"},
4971 .name = "rt5665",