Lines Matching defs:component
142 struct snd_soc_component *component;
466 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
470 snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
475 snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
490 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
495 snd_soc_component_update_bits(component, RT5616_DEPOP_M2,
497 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
501 snd_soc_component_write(component, RT5616_PR_BASE +
504 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
506 snd_soc_component_update_bits(component, RT5616_PWR_VOL,
509 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
514 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
518 snd_soc_component_update_bits(component, RT5616_CHARGE_PUMP,
520 snd_soc_component_update_bits(component, RT5616_PR_BASE +
522 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
527 snd_soc_component_update_bits(component, RT5616_PR_BASE +
529 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
534 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
542 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
556 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
561 snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
567 snd_soc_component_write(component, RT5616_PR_BASE +
569 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
571 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
573 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
577 snd_soc_component_update_bits(component, RT5616_HP_VOL,
580 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
585 snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
591 snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
597 snd_soc_component_write(component, RT5616_PR_BASE +
599 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
601 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
603 snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
607 snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
610 snd_soc_component_update_bits(component, RT5616_HP_VOL,
626 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
630 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
632 snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
637 snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
640 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
654 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
658 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
663 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
677 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
681 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
686 snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
960 struct snd_soc_component *component = dai->component;
961 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
970 dev_err(component->dev, "Unsupported clock setting\n");
975 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
1004 snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
1006 snd_soc_component_update_bits(component, RT5616_ADDA_CLK1, mask_clk, val_clk);
1013 struct snd_soc_component *component = dai->component;
1014 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1055 snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
1065 struct snd_soc_component *component = dai->component;
1066 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1080 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1084 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1097 struct snd_soc_component *component = dai->component;
1098 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1107 dev_dbg(component->dev, "PLL disabled\n");
1111 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1119 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1125 snd_soc_component_update_bits(component, RT5616_GLB_CLK,
1130 dev_err(component->dev, "Unknown PLL source %d\n", source);
1136 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
1140 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1144 snd_soc_component_write(component, RT5616_PLL_CTRL1,
1146 snd_soc_component_write(component, RT5616_PLL_CTRL2,
1158 static int rt5616_set_bias_level(struct snd_soc_component *component,
1161 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1180 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
1190 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1191 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
1197 snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
1200 snd_soc_component_update_bits(component, RT5616_D_MISC,
1207 snd_soc_component_update_bits(component, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
1208 snd_soc_component_write(component, RT5616_PWR_DIG1, 0x0000);
1209 snd_soc_component_write(component, RT5616_PWR_DIG2, 0x0000);
1210 snd_soc_component_write(component, RT5616_PWR_VOL, 0x0000);
1211 snd_soc_component_write(component, RT5616_PWR_MIXER, 0x0000);
1212 snd_soc_component_write(component, RT5616_PWR_ANLG1, 0x0000);
1213 snd_soc_component_write(component, RT5616_PWR_ANLG2, 0x0000);
1223 static int rt5616_probe(struct snd_soc_component *component)
1225 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1228 rt5616->mclk = devm_clk_get(component->dev, "mclk");
1232 rt5616->component = component;
1238 static int rt5616_suspend(struct snd_soc_component *component)
1240 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
1248 static int rt5616_resume(struct snd_soc_component *component)
1250 struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);