Lines Matching refs:rt1305
3 * rt1305.c -- RT1305 ALSA SoC amplifier component driver
30 #include "rt1305.h"
247 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
249 regmap_multi_reg_write(rt1305->regmap, init_list, RT1305_INIT_REG_LEN);
411 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
416 if (rt1305->sysclk_src == RT1305_FS_SYS_PRE_S_PLL1 &&
428 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
430 if (rt1305->sysclk_src == RT1305_FS_SYS_PRE_S_PLL1)
629 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
633 rt1305->lrck = params_rate(params);
634 pre_div = rt1305_get_clk_info(rt1305->sysclk, rt1305->lrck);
638 rt1305->lrck * 64, rt1305->lrck * 256);
640 rt1305->lrck * 256, SND_SOC_CLOCK_IN);
651 rt1305->bclk = rt1305->lrck * (32 << bclk_ms);
657 rt1305->lrck, pre_div, dai->id);
698 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
704 rt1305->master = 1;
708 rt1305->master = 0;
758 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
761 if (freq == rt1305->sysclk && clk_id == rt1305->sysclk_src)
783 rt1305->sysclk = freq;
784 rt1305->sysclk_src = clk_id;
796 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
800 if (source == rt1305->pll_src && freq_in == rt1305->pll_in &&
801 freq_out == rt1305->pll_out)
807 rt1305->pll_in = 0;
808 rt1305->pll_out = 0;
859 rt1305->pll_in = freq_in;
860 rt1305->pll_out = freq_out;
861 rt1305->pll_src = source;
868 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
870 rt1305->component = component;
880 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
882 rt1305_reset(rt1305->regmap);
888 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
890 regcache_cache_only(rt1305->regmap, true);
891 regcache_mark_dirty(rt1305->regmap);
898 struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
900 regcache_cache_only(rt1305->regmap, false);
901 regcache_sync(rt1305->regmap);
922 .name = "rt1305-aif",
970 { .compatible = "realtek,rt1305", },
987 { "rt1305", 0 },
993 static void rt1305_calibrate(struct rt1305_priv *rt1305)
999 regcache_cache_bypass(rt1305->regmap, true);
1001 rt1305_reset(rt1305->regmap);
1002 regmap_write(rt1305->regmap, RT1305_ADC_SET_3, 0x0219);
1003 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcf, 0x5548);
1004 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1005 regmap_write(rt1305->regmap, RT1305_CLOCK_DETECT, 0x1000);
1006 regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0600);
1007 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xffd0);
1008 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0080);
1009 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880);
1010 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe);
1013 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);
1015 regmap_write(rt1305->regmap, RT1305_CAL_EFUSE_CLOCK, 0xb000);
1016 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc3, 0xd4a0);
1017 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcc, 0x00cc);
1018 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1019 regmap_write(rt1305->regmap, RT1305_POWER_STATUS, 0x0000);
1020 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_2, 0xffff);
1021 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfc20);
1022 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x00c0);
1023 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfca0);
1024 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfce0);
1025 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfcf0);
1028 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0080);
1029 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880);
1030 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880);
1031 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfce0);
1032 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfca0);
1033 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfc20);
1034 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x0000);
1035 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0000);
1037 regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_5, &valmsb);
1038 regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_6, &vallsb);
1040 regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_7, &valmsb);
1041 regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_8, &vallsb);
1046 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x9542);
1047 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfcf0);
1048 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_2, 0xffff);
1049 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x1dfe);
1050 regmap_write(rt1305->regmap, RT1305_SILENCE_DETECT, 0x0e13);
1051 regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0650);
1053 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x50, 0x0064);
1054 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x51, 0x0770);
1055 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x52, 0xc30c);
1056 regmap_write(rt1305->regmap, RT1305_SPK_TEMP_PROTECTION_1, 0x8200);
1057 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1058 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1060 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1061 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1073 regmap_write(rt1305->regmap, RT1305_SPK_TEMP_PROTECTION_1, 0x9200);
1074 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1075 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1077 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1078 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1090 regmap_write(rt1305->regmap, RT1305_SPK_TEMP_PROTECTION_1, 0xc2ec);
1094 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4e,
1096 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4f,
1098 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfe,
1100 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfd,
1107 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe);
1109 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);
1110 regmap_write(rt1305->regmap, RT1305_CLOCK_DETECT, 0x3000);
1111 regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0400);
1112 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0000);
1113 regmap_write(rt1305->regmap, RT1305_CAL_EFUSE_CLOCK, 0x8000);
1114 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_2, 0x1020);
1115 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0x0000);
1117 regcache_cache_bypass(rt1305->regmap, false);
1123 struct rt1305_priv *rt1305;
1127 rt1305 = devm_kzalloc(&i2c->dev, sizeof(struct rt1305_priv),
1129 if (rt1305 == NULL)
1132 i2c_set_clientdata(i2c, rt1305);
1134 rt1305->regmap = devm_regmap_init_i2c(i2c, &rt1305_regmap);
1135 if (IS_ERR(rt1305->regmap)) {
1136 ret = PTR_ERR(rt1305->regmap);
1142 regmap_read(rt1305->regmap, RT1305_DEVICE_ID, &val);
1145 "Device with ID register %x is not rt1305\n", val);
1149 rt1305_reset(rt1305->regmap);
1150 rt1305_calibrate(rt1305);
1159 struct rt1305_priv *rt1305 = i2c_get_clientdata(client);
1161 rt1305_reset(rt1305->regmap);
1167 .name = "rt1305",