Lines Matching defs:RT1305_PR_BASE
36 #define RT1305_PR_BASE (RT1305_PR_RANGE_BASE + (0 * RT1305_PR_SPACING))
42 .range_min = RT1305_PR_BASE,
43 .range_max = RT1305_PR_BASE + 0xff,
55 { RT1305_PR_BASE + 0xcf, 0x5548 },
56 { RT1305_PR_BASE + 0x5d, 0x0442 },
57 { RT1305_PR_BASE + 0xc1, 0x0320 },
1003 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcf, 0x5548);
1004 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1013 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);
1016 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc3, 0xd4a0);
1017 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcc, 0x00cc);
1018 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1022 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x00c0);
1034 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x0000);
1046 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x9542);
1053 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x50, 0x0064);
1054 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x51, 0x0770);
1055 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x52, 0xc30c);
1057 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1058 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1060 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1061 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1074 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1075 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1077 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1078 regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1094 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4e,
1096 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4f,
1098 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfe,
1100 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfd,
1109 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);