Lines Matching defs:nau8825
31 #include "nau8825.h"
34 #define NUVOTON_CODEC_DAI "nau8825-hifi"
48 static int nau8825_configure_sysclk(struct nau8825 *nau8825,
239 * @nau8825: component to register the codec private data with
256 static int nau8825_sema_acquire(struct nau8825 *nau8825, long timeout)
261 ret = down_timeout(&nau8825->xtalk_sem, timeout);
263 dev_warn(nau8825->dev, "Acquire semaphore timeout\n");
265 ret = down_trylock(&nau8825->xtalk_sem);
267 dev_warn(nau8825->dev, "Acquire semaphore fail\n");
275 * @nau8825: component to register the codec private data with
280 static inline void nau8825_sema_release(struct nau8825 *nau8825)
282 up(&nau8825->xtalk_sem);
287 * @nau8825: component to register the codec private data with
292 static inline void nau8825_sema_reset(struct nau8825 *nau8825)
294 nau8825->xtalk_sem.count = 1;
300 * @nau8825: component to register the codec private data with
310 static void nau8825_hpvol_ramp(struct nau8825 *nau8825,
335 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL,
344 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL,
452 static void nau8825_xtalk_backup(struct nau8825 *nau8825)
456 if (nau8825->xtalk_baktab_initialized)
461 regmap_read(nau8825->regmap, nau8825_xtalk_baktab[i].reg,
464 nau8825->xtalk_baktab_initialized = true;
467 static void nau8825_xtalk_restore(struct nau8825 *nau8825, bool cause_cancel)
471 if (!nau8825->xtalk_baktab_initialized)
485 nau8825_hpvol_ramp(nau8825, 0, volume, 3);
488 regmap_write(nau8825->regmap, nau8825_xtalk_baktab[i].reg,
492 nau8825->xtalk_baktab_initialized = false;
495 static void nau8825_xtalk_prepare_dac(struct nau8825 *nau8825)
498 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
507 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
511 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC,
516 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
521 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
525 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL,
528 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
531 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLASSG_CTRL,
536 static void nau8825_xtalk_prepare_adc(struct nau8825 *nau8825)
539 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2,
544 static void nau8825_xtalk_clock(struct nau8825 *nau8825)
547 regmap_write(nau8825->regmap, NAU8825_REG_FLL1, 0x0);
548 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, 0x3126);
549 regmap_write(nau8825->regmap, NAU8825_REG_FLL3, 0x0008);
550 regmap_write(nau8825->regmap, NAU8825_REG_FLL4, 0x0010);
551 regmap_write(nau8825->regmap, NAU8825_REG_FLL5, 0x0);
552 regmap_write(nau8825->regmap, NAU8825_REG_FLL6, 0x6000);
554 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
556 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN,
561 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
563 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
567 static void nau8825_xtalk_prepare(struct nau8825 *nau8825)
572 nau8825_xtalk_backup(nau8825);
574 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
585 nau8825_hpvol_ramp(nau8825, volume, 0, 3);
587 nau8825_xtalk_clock(nau8825);
588 nau8825_xtalk_prepare_dac(nau8825);
589 nau8825_xtalk_prepare_adc(nau8825);
591 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL,
594 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL,
600 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL,
606 regmap_update_bits(nau8825->regmap,
609 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
613 static void nau8825_xtalk_clean_dac(struct nau8825 *nau8825)
616 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
619 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL,
623 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
627 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
631 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
633 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
637 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC,
640 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
643 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
646 if (!nau8825->irq)
647 regmap_update_bits(nau8825->regmap,
651 static void nau8825_xtalk_clean_adc(struct nau8825 *nau8825)
654 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2,
658 static void nau8825_xtalk_clean(struct nau8825 *nau8825, bool cause_cancel)
661 nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0);
662 nau8825_xtalk_clean_dac(nau8825);
663 nau8825_xtalk_clean_adc(nau8825);
665 regmap_write(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, 0);
667 regmap_update_bits(nau8825->regmap, NAU8825_REG_INTERRUPT_MASK,
670 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
674 nau8825_xtalk_restore(nau8825, cause_cancel);
677 static void nau8825_xtalk_imm_start(struct nau8825 *nau8825, int vol)
680 regmap_update_bits(nau8825->regmap, NAU8825_REG_ADC_DGAIN_CTRL,
685 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
688 switch (nau8825->xtalk_state) {
691 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
697 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
706 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL,
710 static void nau8825_xtalk_imm_stop(struct nau8825 *nau8825)
713 regmap_update_bits(nau8825->regmap,
737 static void nau8825_xtalk_measure(struct nau8825 *nau8825)
741 switch (nau8825->xtalk_state) {
746 nau8825_xtalk_prepare(nau8825);
749 nau8825->xtalk_state = NAU8825_XTALK_HPR_R2L;
750 nau8825_xtalk_imm_start(nau8825, 0x00d2);
756 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L,
757 &nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]);
758 dev_dbg(nau8825->dev, "HPR_R2L imm: %x\n",
759 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]);
761 nau8825_xtalk_imm_stop(nau8825);
763 nau8825->xtalk_state = NAU8825_XTALK_HPL_R2L;
764 nau8825_xtalk_imm_start(nau8825, 0x00ff);
773 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L,
774 &nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]);
775 dev_dbg(nau8825->dev, "HPL_R2L imm: %x\n",
776 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]);
777 nau8825_xtalk_imm_stop(nau8825);
779 nau8825->xtalk_state = NAU8825_XTALK_IMM;
788 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L],
789 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]);
790 dev_dbg(nau8825->dev, "cross talk sidetone: %x\n", sidetone);
791 regmap_write(nau8825->regmap, NAU8825_REG_DAC_DGAIN_CTRL,
793 nau8825_xtalk_clean(nau8825, false);
794 nau8825->xtalk_state = NAU8825_XTALK_DONE;
803 struct nau8825 *nau8825 = container_of(
804 work, struct nau8825, xtalk_work);
806 nau8825_xtalk_measure(nau8825);
810 if (nau8825->xtalk_state == NAU8825_XTALK_IMM)
811 nau8825_xtalk_measure(nau8825);
819 if (nau8825->xtalk_state == NAU8825_XTALK_DONE) {
820 snd_soc_jack_report(nau8825->jack, nau8825->xtalk_event,
821 nau8825->xtalk_event_mask);
822 nau8825_sema_release(nau8825);
823 nau8825->xtalk_protect = false;
827 static void nau8825_xtalk_cancel(struct nau8825 *nau8825)
833 if (nau8825->xtalk_enable && nau8825->xtalk_state !=
835 cancel_work_sync(&nau8825->xtalk_work);
836 nau8825_xtalk_clean(nau8825, true);
839 nau8825_sema_reset(nau8825);
840 nau8825->xtalk_state = NAU8825_XTALK_DONE;
841 nau8825->xtalk_protect = false;
916 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
921 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
925 if (!nau8825->irq)
926 regmap_update_bits(nau8825->regmap,
940 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
946 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
950 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
964 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
969 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
973 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
1218 static int nau8825_clock_check(struct nau8825 *nau8825,
1234 dev_err(nau8825->dev, "exceed the maximum frequency of CLK_ADC or CLK_DAC\n");
1246 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1249 nau8825_sema_acquire(nau8825, 3 * HZ);
1258 regmap_read(nau8825->regmap, NAU8825_REG_DAC_CTRL1, &osr);
1260 if (nau8825_clock_check(nau8825, substream->stream,
1262 nau8825_sema_release(nau8825);
1265 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
1269 regmap_read(nau8825->regmap, NAU8825_REG_ADC_RATE, &osr);
1271 if (nau8825_clock_check(nau8825, substream->stream,
1273 nau8825_sema_release(nau8825);
1276 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
1282 regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, &ctrl_val);
1293 nau8825_sema_release(nau8825);
1296 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
1315 nau8825_sema_release(nau8825);
1319 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1,
1323 nau8825_sema_release(nau8825);
1331 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1375 nau8825_sema_acquire(nau8825, 3 * HZ);
1377 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1,
1381 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
1385 nau8825_sema_release(nau8825);
1400 .name = "nau8825-hifi",
1431 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1432 struct regmap *regmap = nau8825->regmap;
1434 nau8825->jack = jack;
1491 static void nau8825_eject_jack(struct nau8825 *nau8825)
1493 struct snd_soc_dapm_context *dapm = nau8825->dapm;
1494 struct regmap *regmap = nau8825->regmap;
1497 nau8825_xtalk_cancel(nau8825);
1531 nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0);
1535 static void nau8825_setup_auto_irq(struct nau8825 *nau8825)
1537 struct regmap *regmap = nau8825->regmap;
1546 nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0);
1594 static int nau8825_jack_insert(struct nau8825 *nau8825)
1596 struct regmap *regmap = nau8825->regmap;
1597 struct snd_soc_dapm_context *dapm = nau8825->dapm;
1605 nau8825->high_imped = true;
1607 nau8825->high_imped = false;
1615 dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n");
1635 dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n");
1656 dev_err(nau8825->dev, "detection error; disable mic function\n");
1673 struct nau8825 *nau8825 = (struct nau8825 *)data;
1674 struct regmap *regmap = nau8825->regmap;
1678 dev_err(nau8825->dev, "failed to read irq status\n");
1685 nau8825_eject_jack(nau8825);
1697 nau8825->button_pressed = nau8825_button_decode(
1700 event |= nau8825->button_pressed;
1708 event |= nau8825_jack_insert(nau8825);
1709 if (nau8825->xtalk_enable && !nau8825->high_imped) {
1713 if (!nau8825->xtalk_protect) {
1721 nau8825->xtalk_protect = true;
1722 ret = nau8825_sema_acquire(nau8825, 0);
1724 nau8825->xtalk_protect = false;
1727 if (nau8825->xtalk_protect) {
1728 nau8825->xtalk_state =
1730 schedule_work(&nau8825->xtalk_work);
1737 if (nau8825->xtalk_protect) {
1738 nau8825_sema_release(nau8825);
1739 nau8825->xtalk_protect = false;
1743 dev_warn(nau8825->dev, "Headset completion IRQ fired but no headset connected\n");
1744 nau8825_eject_jack(nau8825);
1753 if (nau8825->xtalk_state == NAU8825_XTALK_PREPARE) {
1754 nau8825->xtalk_event = event;
1755 nau8825->xtalk_event_mask = event_mask;
1759 if (nau8825->xtalk_enable && nau8825->xtalk_protect)
1760 schedule_work(&nau8825->xtalk_work);
1780 nau8825_setup_auto_irq(nau8825);
1794 if (event_mask && nau8825->xtalk_state == NAU8825_XTALK_DONE)
1795 snd_soc_jack_report(nau8825->jack, event, event_mask);
1800 static void nau8825_setup_buttons(struct nau8825 *nau8825)
1802 struct regmap *regmap = nau8825->regmap;
1806 nau8825->sar_voltage << NAU8825_SAR_TRACKING_GAIN_SFT);
1809 nau8825->sar_compare_time << NAU8825_SAR_COMPARE_TIME_SFT);
1812 nau8825->sar_sampling_time << NAU8825_SAR_SAMPLING_TIME_SFT);
1816 (nau8825->sar_threshold_num - 1) << NAU8825_KEYDET_LEVELS_NR_SFT);
1819 nau8825->sar_hysteresis << NAU8825_KEYDET_HYSTERESIS_SFT);
1822 nau8825->key_debounce << NAU8825_KEYDET_SHORTKEY_DEBOUNCE_SFT);
1825 (nau8825->sar_threshold[0] << 8) | nau8825->sar_threshold[1]);
1827 (nau8825->sar_threshold[2] << 8) | nau8825->sar_threshold[3]);
1829 (nau8825->sar_threshold[4] << 8) | nau8825->sar_threshold[5]);
1831 (nau8825->sar_threshold[6] << 8) | nau8825->sar_threshold[7]);
1839 static void nau8825_init_regs(struct nau8825 *nau8825)
1841 struct regmap *regmap = nau8825->regmap;
1846 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
1848 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
1854 nau8825->vref_impedance << NAU8825_BIAS_VMID_SEL_SFT);
1864 nau8825->jkdet_enable ? 0 : NAU8825_JKDET_OUTPUT_EN);
1867 nau8825->jkdet_pull_enable ? 0 : NAU8825_JKDET_PULL_EN);
1870 nau8825->jkdet_pull_up ? NAU8825_JKDET_PULL_UP : 0);
1874 nau8825->jkdet_polarity ? 0 : NAU8825_JACK_POLARITY);
1878 nau8825->jack_insert_debounce << NAU8825_JACK_INSERT_DEBOUNCE_SFT);
1881 nau8825->jack_eject_debounce << NAU8825_JACK_EJECT_DEBOUNCE_SFT);
1891 NAU8825_MICBIAS_VOLTAGE_MASK, nau8825->micbias_voltage);
1893 if (nau8825->sar_threshold_num)
1894 nau8825_setup_buttons(nau8825);
1912 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
1934 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL,
1936 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL,
1959 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1962 nau8825->dapm = dapm;
1969 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1972 nau8825_xtalk_cancel(nau8825);
2041 static void nau8825_fll_apply(struct nau8825 *nau8825,
2044 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
2048 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
2052 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, fll_param->fll_frac);
2054 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL3,
2057 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4,
2061 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
2064 regmap_update_bits(nau8825->regmap,
2068 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
2073 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
2078 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
2081 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
2090 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2104 nau8825_fll_apply(nau8825, &fll_param);
2106 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
2111 static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq)
2115 nau8825->mclk = devm_clk_get(nau8825->dev, "mclk");
2116 if (IS_ERR(nau8825->mclk)) {
2117 dev_info(nau8825->dev, "No 'mclk' clock found, assume MCLK is managed externally");
2121 if (!nau8825->mclk_freq) {
2122 ret = clk_prepare_enable(nau8825->mclk);
2124 dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
2129 if (nau8825->mclk_freq != freq) {
2130 freq = clk_round_rate(nau8825->mclk, freq);
2131 ret = clk_set_rate(nau8825->mclk, freq);
2133 dev_err(nau8825->dev, "Unable to set mclk rate\n");
2136 nau8825->mclk_freq = freq;
2153 static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
2156 struct regmap *regmap = nau8825->regmap;
2163 if (nau8825->mclk_freq) {
2164 clk_disable_unprepare(nau8825->mclk);
2165 nau8825->mclk_freq = 0;
2175 nau8825_sema_acquire(nau8825, 3 * HZ);
2181 nau8825_sema_release(nau8825);
2183 ret = nau8825_mclk_prepare(nau8825, freq);
2189 if (nau8825_is_jack_inserted(nau8825->regmap)) {
2209 dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n");
2211 if (nau8825->mclk_freq) {
2212 clk_disable_unprepare(nau8825->mclk);
2213 nau8825->mclk_freq = 0;
2223 nau8825_sema_acquire(nau8825, 3 * HZ);
2232 nau8825_sema_release(nau8825);
2234 ret = nau8825_mclk_prepare(nau8825, freq);
2245 nau8825_sema_acquire(nau8825, 3 * HZ);
2257 nau8825_sema_release(nau8825);
2259 if (nau8825->mclk_freq) {
2260 clk_disable_unprepare(nau8825->mclk);
2261 nau8825->mclk_freq = 0;
2271 nau8825_sema_acquire(nau8825, 3 * HZ);
2283 nau8825_sema_release(nau8825);
2285 if (nau8825->mclk_freq) {
2286 clk_disable_unprepare(nau8825->mclk);
2287 nau8825->mclk_freq = 0;
2292 dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id);
2296 dev_dbg(nau8825->dev, "Sysclk is %dHz and clock id is %d\n", freq,
2304 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2306 return nau8825_configure_sysclk(nau8825, clk_id, freq);
2309 static int nau8825_resume_setup(struct nau8825 *nau8825)
2311 struct regmap *regmap = nau8825->regmap;
2314 nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0);
2337 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2349 if (nau8825->mclk_freq) {
2350 ret = clk_prepare_enable(nau8825->mclk);
2352 dev_err(nau8825->dev, "Unable to prepare component mclk\n");
2357 nau8825_resume_setup(nau8825);
2364 regmap_update_bits(nau8825->regmap, NAU8825_REG_MIC_BIAS,
2367 regmap_update_bits(nau8825->regmap,
2370 nau8825_xtalk_cancel(nau8825);
2374 regmap_write(nau8825->regmap,
2377 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
2379 if (nau8825->mclk_freq)
2380 clk_disable_unprepare(nau8825->mclk);
2388 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2390 disable_irq(nau8825->irq);
2393 snd_soc_dapm_disable_pin(nau8825->dapm, "SAR");
2394 snd_soc_dapm_disable_pin(nau8825->dapm, "MICBIAS");
2395 snd_soc_dapm_sync(nau8825->dapm);
2396 regcache_cache_only(nau8825->regmap, true);
2397 regcache_mark_dirty(nau8825->regmap);
2404 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2407 regcache_cache_only(nau8825->regmap, false);
2408 regcache_sync(nau8825->regmap);
2409 nau8825->xtalk_protect = true;
2410 ret = nau8825_sema_acquire(nau8825, 0);
2412 nau8825->xtalk_protect = false;
2413 enable_irq(nau8825->irq);
2445 static void nau8825_print_device_properties(struct nau8825 *nau8825)
2448 struct device *dev = nau8825->dev;
2450 dev_dbg(dev, "jkdet-enable: %d\n", nau8825->jkdet_enable);
2451 dev_dbg(dev, "jkdet-pull-enable: %d\n", nau8825->jkdet_pull_enable);
2452 dev_dbg(dev, "jkdet-pull-up: %d\n", nau8825->jkdet_pull_up);
2453 dev_dbg(dev, "jkdet-polarity: %d\n", nau8825->jkdet_polarity);
2454 dev_dbg(dev, "micbias-voltage: %d\n", nau8825->micbias_voltage);
2455 dev_dbg(dev, "vref-impedance: %d\n", nau8825->vref_impedance);
2457 dev_dbg(dev, "sar-threshold-num: %d\n", nau8825->sar_threshold_num);
2458 for (i = 0; i < nau8825->sar_threshold_num; i++)
2460 nau8825->sar_threshold[i]);
2462 dev_dbg(dev, "sar-hysteresis: %d\n", nau8825->sar_hysteresis);
2463 dev_dbg(dev, "sar-voltage: %d\n", nau8825->sar_voltage);
2464 dev_dbg(dev, "sar-compare-time: %d\n", nau8825->sar_compare_time);
2465 dev_dbg(dev, "sar-sampling-time: %d\n", nau8825->sar_sampling_time);
2466 dev_dbg(dev, "short-key-debounce: %d\n", nau8825->key_debounce);
2468 nau8825->jack_insert_debounce);
2470 nau8825->jack_eject_debounce);
2472 nau8825->xtalk_enable);
2476 struct nau8825 *nau8825) {
2479 nau8825->jkdet_enable = device_property_read_bool(dev,
2481 nau8825->jkdet_pull_enable = device_property_read_bool(dev,
2483 nau8825->jkdet_pull_up = device_property_read_bool(dev,
2486 &nau8825->jkdet_polarity);
2488 nau8825->jkdet_polarity = 1;
2490 &nau8825->micbias_voltage);
2492 nau8825->micbias_voltage = 6;
2494 &nau8825->vref_impedance);
2496 nau8825->vref_impedance = 2;
2498 &nau8825->sar_threshold_num);
2500 nau8825->sar_threshold_num = 4;
2502 nau8825->sar_threshold, nau8825->sar_threshold_num);
2504 nau8825->sar_threshold[0] = 0x08;
2505 nau8825->sar_threshold[1] = 0x12;
2506 nau8825->sar_threshold[2] = 0x26;
2507 nau8825->sar_threshold[3] = 0x73;
2510 &nau8825->sar_hysteresis);
2512 nau8825->sar_hysteresis = 0;
2514 &nau8825->sar_voltage);
2516 nau8825->sar_voltage = 6;
2518 &nau8825->sar_compare_time);
2520 nau8825->sar_compare_time = 1;
2522 &nau8825->sar_sampling_time);
2524 nau8825->sar_sampling_time = 1;
2526 &nau8825->key_debounce);
2528 nau8825->key_debounce = 3;
2530 &nau8825->jack_insert_debounce);
2532 nau8825->jack_insert_debounce = 7;
2534 &nau8825->jack_eject_debounce);
2536 nau8825->jack_eject_debounce = 0;
2537 nau8825->xtalk_enable = device_property_read_bool(dev,
2540 nau8825->mclk = devm_clk_get(dev, "mclk");
2541 if (PTR_ERR(nau8825->mclk) == -EPROBE_DEFER) {
2543 } else if (PTR_ERR(nau8825->mclk) == -ENOENT) {
2545 nau8825->mclk = NULL;
2547 } else if (IS_ERR(nau8825->mclk)) {
2554 static int nau8825_setup_irq(struct nau8825 *nau8825)
2558 ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL,
2560 "nau8825", nau8825);
2563 dev_err(nau8825->dev, "Cannot request irq %d (%d)\n",
2564 nau8825->irq, ret);
2575 struct nau8825 *nau8825 = dev_get_platdata(&i2c->dev);
2578 if (!nau8825) {
2579 nau8825 = devm_kzalloc(dev, sizeof(*nau8825), GFP_KERNEL);
2580 if (!nau8825)
2582 ret = nau8825_read_device_properties(dev, nau8825);
2587 i2c_set_clientdata(i2c, nau8825);
2589 nau8825->regmap = devm_regmap_init_i2c(i2c, &nau8825_regmap_config);
2590 if (IS_ERR(nau8825->regmap))
2591 return PTR_ERR(nau8825->regmap);
2592 nau8825->dev = dev;
2593 nau8825->irq = i2c->irq;
2597 nau8825->xtalk_state = NAU8825_XTALK_DONE;
2598 nau8825->xtalk_protect = false;
2599 nau8825->xtalk_baktab_initialized = false;
2600 sema_init(&nau8825->xtalk_sem, 1);
2601 INIT_WORK(&nau8825->xtalk_work, nau8825_xtalk_work);
2603 nau8825_print_device_properties(nau8825);
2605 nau8825_reset_chip(nau8825->regmap);
2606 ret = regmap_read(nau8825->regmap, NAU8825_REG_I2C_DEVICE_ID, &value);
2618 nau8825_init_regs(nau8825);
2621 nau8825_setup_irq(nau8825);
2634 { "nau8825", 0 },
2641 { .compatible = "nuvoton,nau8825", },
2657 .name = "nau8825",
2667 MODULE_DESCRIPTION("ASoC nau8825 driver");