Lines Matching refs:regmap

24 	regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe);
25 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249);
28 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6);
29 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1);
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ff8);
40 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR0, 0x7 << 9, 0x0);
46 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x0e00);
47 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x0200);
49 regmap_write(priv->regmap, MT6359_GPIO_MODE4_CLR, 0x003f);
50 regmap_write(priv->regmap, MT6359_GPIO_MODE4_SET, 0x0009);
61 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x0e00);
63 regmap_write(priv->regmap, MT6359_GPIO_MODE4_CLR, 0x003f);
65 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR0,
67 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR1,
73 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON13,
83 regmap_update_bits(priv->regmap,
87 regmap_update_bits(priv->regmap,
90 regmap_update_bits(priv->regmap,
96 regmap_update_bits(priv->regmap,
100 regmap_update_bits(priv->regmap,
107 regmap_update_bits(priv->regmap,
111 regmap_update_bits(priv->regmap,
121 regmap_update_bits(priv->regmap, MT6359_AFE_AUD_PAD_TOP,
127 regmap_write(priv->regmap, MT6359_ZCD_CON0, 0x0000);
138 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1,
141 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1,
156 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON9,
172 regmap_update_bits(priv->regmap,
186 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2,
193 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2,
232 regmap_update_bits(priv->regmap,
261 regmap_read(priv->regmap, MT6359_ZCD_CON2, &reg);
268 regmap_read(priv->regmap, MT6359_ZCD_CON1, &reg);
275 regmap_read(priv->regmap, MT6359_ZCD_CON3, &reg);
280 regmap_read(priv->regmap, MT6359_AUDENC_ANA_CON0, &reg);
285 regmap_read(priv->regmap, MT6359_AUDENC_ANA_CON1, &reg);
290 regmap_read(priv->regmap, MT6359_AUDENC_ANA_CON2, &reg);
629 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x0006);
631 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba1);
633 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x0003);
635 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x000b);
637 regmap_update_bits(priv->regmap, MT6359_AFE_SGEN_CFG0,
640 regmap_update_bits(priv->regmap, MT6359_AFE_SGEN_CFG1,
646 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x0000);
647 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba0);
660 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11,
665 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12,
668 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12,
673 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11,
678 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12,
681 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12,
688 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON10, 0x0087);
693 regmap_update_bits(priv->regmap,
698 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON4, 0x0000);
701 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON2, 0xf133);
704 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x000c);
706 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x003c);
708 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0c00);
710 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x30c0);
712 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x30f0);
714 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x00fc);
720 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0e00);
722 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0200);
725 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x00ff);
732 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77cf);
740 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77c3);
742 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x7703);
749 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x30ff);
752 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0xf201);
755 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0xf200);
760 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x32ff);
762 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x3aff);
774 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
778 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON9,
782 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
789 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77c3);
791 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77cf);
799 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77ff);
808 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x3, 0x0);
811 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0e01);
814 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0c01);
820 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1,
824 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
828 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
832 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x201);
835 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1,
839 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1,
886 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0010);
889 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11,
894 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12,
897 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12,
902 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0090);
905 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON10, 0x7000);
908 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0092);
910 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0093);
913 regmap_write(priv->regmap, MT6359_ZCD_CON3,
920 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x0009);
922 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0001);
924 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x009b);
928 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6,
933 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
940 regmap_write(priv->regmap, MT6359_ZCD_CON3, DL_GAIN_N_40DB);
943 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6,
947 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6,
970 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0010);
973 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11,
979 regmap_update_bits(priv->regmap,
984 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12,
989 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0110);
992 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0112);
994 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0113);
997 regmap_write(priv->regmap, MT6359_ZCD_CON1,
1004 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x3113);
1007 regmap_write(priv->regmap,
1010 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x311b);
1014 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7,
1019 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
1026 regmap_write(priv->regmap, MT6359_ZCD_CON1, DL_GAIN_N_40DB);
1029 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7,
1033 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7,
1055 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1058 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1060 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1062 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1067 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1069 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1071 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1073 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5,
1096 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0,
1098 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0,
1100 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0,
1103 regmap_write(priv->regmap, MT6359_AFE_DCCLK_CFG1, 0x0100);
1106 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0,
1108 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0,
1133 regmap_update_bits(priv->regmap,
1138 regmap_update_bits(priv->regmap,
1143 regmap_update_bits(priv->regmap,
1150 regmap_write(priv->regmap,
1153 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON15,
1157 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON15,
1163 regmap_write(priv->regmap, MT6359_AUDENC_ANA_CON15, 0x0000);
1187 regmap_write(priv->regmap,
1190 regmap_write(priv->regmap,
1194 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON16,
1220 regmap_update_bits(priv->regmap,
1225 regmap_update_bits(priv->regmap,
1230 regmap_update_bits(priv->regmap,
1237 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON17,
1241 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON17,
1247 regmap_write(priv->regmap, MT6359_AUDENC_ANA_CON17, 0x0000);
1292 regmap_write(priv->regmap, MT6359_AFE_UL_SRC_CON0_H,
1295 regmap_write(priv->regmap, MT6359_AFE_UL_SRC_CON0_H,
1298 regmap_update_bits(priv->regmap, MT6359_AFE_UL_SRC_CON0_L,
1302 regmap_write(priv->regmap,
1324 regmap_write(priv->regmap,
1326 regmap_update_bits(priv->regmap, MT6359_AFE_ADDA6_UL_SRC_CON0_L,
1330 regmap_write(priv->regmap,
1353 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0,
1377 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1,
1401 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2,
1478 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0,
1485 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0,
1491 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0,
1498 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0,
1537 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1,
1544 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1,
1550 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1,
1557 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1,
1593 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2,
1600 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2,
1606 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2,
1613 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2,
1688 regmap_write(priv->regmap, MT6359_ZCD_CON2, DL_GAIN_N_22DB_REG);
1692 regmap_write(priv->regmap, MT6359_ZCD_CON2, DL_GAIN_N_40DB_REG);
1712 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON10, 0x0000);
1731 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2,
1738 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2,
1758 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2,
1761 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba1);
1763 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2,
1766 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2,
1771 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2,
1773 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba0);
1792 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x0006);
1794 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON9, 0xcba1);
1796 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x0003);
1798 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x000b);
1802 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x0000);
1803 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON9, 0xcba0);
1821 regmap_write(priv->regmap, MT6359_AFE_NCP_CFG0, 0xc800);
2535 regmap_update_bits(priv->regmap, MT6359_DCXO_CW12,
2542 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON23,
2547 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
2550 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0,
2554 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6,
2558 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7,
2573 regmap_update_bits(priv->regmap, MT6359_DCXO_CW12,
2584 snd_soc_component_init_regmap(cmpnt, priv->regmap);
2693 priv->regmap = mt6397->regmap;
2694 if (IS_ERR(priv->regmap))
2695 return PTR_ERR(priv->regmap);