Lines Matching refs:x00
29 {MAX98390_INT_EN2, 0x00},
30 {MAX98390_INT_EN3, 0x00},
31 {MAX98390_INT_FLAG_CLR1, 0x00},
32 {MAX98390_INT_FLAG_CLR2, 0x00},
33 {MAX98390_INT_FLAG_CLR3, 0x00},
37 {MAX98390_WDOG_CTRL, 0x00},
38 {MAX98390_WDOG_RST, 0x00},
43 {MAX98390_PCM_RX_EN_A, 0x00},
44 {MAX98390_PCM_RX_EN_B, 0x00},
45 {MAX98390_PCM_TX_EN_A, 0x00},
46 {MAX98390_PCM_TX_EN_B, 0x00},
49 {MAX98390_PCM_CH_SRC_1, 0x00},
50 {MAX98390_PCM_CH_SRC_2, 0x00},
51 {MAX98390_PCM_CH_SRC_3, 0x00},
56 {MAX98390_ICC_RX_EN_A, 0x00},
57 {MAX98390_ICC_RX_EN_B, 0x00},
58 {MAX98390_ICC_TX_EN_A, 0x00},
59 {MAX98390_ICC_TX_EN_B, 0x00},
60 {MAX98390_ICC_HIZ_MANUAL_MODE, 0x00},
61 {MAX98390_ICC_TX_HIZ_EN_A, 0x00},
62 {MAX98390_ICC_TX_HIZ_EN_B, 0x00},
63 {MAX98390_ICC_LNK_EN, 0x00},
66 {MAX98390_TONE_GEN_DC_CFG, 0x00},
67 {MAX98390_SPK_SRC_SEL, 0x00},
75 {MAX98390_MEAS_ADC_BASE_MSB, 0x00},
77 {MAX98390_ADC_CH0_DIVIDE, 0x00},
78 {MAX98390_ADC_CH1_DIVIDE, 0x00},
79 {MAX98390_ADC_CH2_DIVIDE, 0x00},
80 {MAX98390_ADC_CH0_FILT_CFG, 0x00},
81 {MAX98390_ADC_CH1_FILT_CFG, 0x00},
82 {MAX98390_ADC_CH2_FILT_CFG, 0x00},
84 {MAX98390_BROWNOUT_EN, 0x00},
85 {MAX98390_BROWNOUT_INFINITE_HOLD, 0x00},
86 {MAX98390_BROWNOUT_INFINITE_HOLD_CLR, 0x00},
87 {MAX98390_BROWNOUT_LVL_HOLD, 0x00},
88 {MAX98390_BROWNOUT_LVL1_THRESH, 0x00},
89 {MAX98390_BROWNOUT_LVL2_THRESH, 0x00},
90 {MAX98390_BROWNOUT_LVL3_THRESH, 0x00},
91 {MAX98390_BROWNOUT_LVL4_THRESH, 0x00},
92 {MAX98390_BROWNOUT_THRESH_HYSTERYSIS, 0x00},
94 {MAX98390_BROWNOUT_AMP_GAIN_ATK_REL, 0x00},
95 {MAX98390_BROWNOUT_AMP1_CLIP_MODE, 0x00},
96 {MAX98390_BROWNOUT_LVL1_CUR_LIMIT, 0x00},
97 {MAX98390_BROWNOUT_LVL1_AMP1_CTRL1, 0x00},
98 {MAX98390_BROWNOUT_LVL1_AMP1_CTRL2, 0x00},
99 {MAX98390_BROWNOUT_LVL1_AMP1_CTRL3, 0x00},
100 {MAX98390_BROWNOUT_LVL2_CUR_LIMIT, 0x00},
101 {MAX98390_BROWNOUT_LVL2_AMP1_CTRL1, 0x00},
102 {MAX98390_BROWNOUT_LVL2_AMP1_CTRL2, 0x00},
103 {MAX98390_BROWNOUT_LVL2_AMP1_CTRL3, 0x00},
104 {MAX98390_BROWNOUT_LVL3_CUR_LIMIT, 0x00},
105 {MAX98390_BROWNOUT_LVL3_AMP1_CTRL1, 0x00},
106 {MAX98390_BROWNOUT_LVL3_AMP1_CTRL2, 0x00},
107 {MAX98390_BROWNOUT_LVL3_AMP1_CTRL3, 0x00},
108 {MAX98390_BROWNOUT_LVL4_CUR_LIMIT, 0x00},
109 {MAX98390_BROWNOUT_LVL4_AMP1_CTRL1, 0x00},
110 {MAX98390_BROWNOUT_LVL4_AMP1_CTRL2, 0x00},
111 {MAX98390_BROWNOUT_LVL4_AMP1_CTRL3, 0x00},
112 {MAX98390_BROWNOUT_ILIM_HLD, 0x00},
113 {MAX98390_BROWNOUT_LIM_HLD, 0x00},
114 {MAX98390_BROWNOUT_CLIP_HLD, 0x00},
115 {MAX98390_BROWNOUT_GAIN_HLD, 0x00},
124 {MAX98390_FET_SCALING1, 0x00},
126 {MAX98390_FET_SCALING3, 0x00},
128 {MAX98390_SPK_SPEEDUP, 0x00},
129 {DSMIG_WB_DRC_RELEASE_TIME_1, 0x00},
130 {DSMIG_WB_DRC_RELEASE_TIME_2, 0x00},
131 {DSMIG_WB_DRC_ATTACK_TIME_1, 0x00},
132 {DSMIG_WB_DRC_ATTACK_TIME_2, 0x00},
133 {DSMIG_WB_DRC_COMPRESSION_RATIO, 0x00},
134 {DSMIG_WB_DRC_COMPRESSION_THRESHOLD, 0x00},
135 {DSMIG_WB_DRC_MAKEUPGAIN, 0x00},
136 {DSMIG_WB_DRC_NOISE_GATE_THRESHOLD, 0x00},
137 {DSMIG_WBDRC_HPF_ENABLE, 0x00},
138 {DSMIG_WB_DRC_TEST_SMOOTHER_OUT_EN, 0x00},
139 {DSMIG_PPR_THRESHOLD, 0x00},
140 {DSM_STEREO_BASS_CHANNEL_SELECT, 0x00},
141 {DSM_TPROT_THRESHOLD_BYTE0, 0x00},
142 {DSM_TPROT_THRESHOLD_BYTE1, 0x00},
143 {DSM_TPROT_ROOM_TEMPERATURE_BYTE0, 0x00},
144 {DSM_TPROT_ROOM_TEMPERATURE_BYTE1, 0x00},
145 {DSM_TPROT_RECIP_RDC_ROOM_BYTE0, 0x00},
146 {DSM_TPROT_RECIP_RDC_ROOM_BYTE1, 0x00},
147 {DSM_TPROT_RECIP_RDC_ROOM_BYTE2, 0x00},
148 {DSM_TPROT_RECIP_TCONST_BYTE0, 0x00},
149 {DSM_TPROT_RECIP_TCONST_BYTE1, 0x00},
150 {DSM_TPROT_RECIP_TCONST_BYTE2, 0x00},
151 {DSM_THERMAL_ATTENUATION_SETTINGS, 0x00},
152 {DSM_THERMAL_PILOT_TONE_ATTENUATION, 0x00},
153 {DSM_TPROT_PG_TEMP_THRESH_BYTE0, 0x00},
154 {DSM_TPROT_PG_TEMP_THRESH_BYTE1, 0x00},
155 {DSMIG_DEBUZZER_THRESHOLD, 0x00},
159 {DSMIG_EN, 0x00},
160 {MAX98390_R23E1_DSP_GLOBAL_EN, 0x00},
161 {MAX98390_R23FF_GLOBAL_EN, 0x00},
841 regmap_write(max98390->regmap, MAX98390_R23FF_GLOBAL_EN, 0x00);
853 regmap_write(max98390->regmap, MAX98390_DAT_MON, 0x00);
854 regmap_write(max98390->regmap, MAX98390_PWR_GATE_CTL, 0x00);