Lines Matching defs:component
251 static void m98095_eq_band(struct snd_soc_component *component, unsigned int dai,
269 snd_soc_component_write(component, eq_reg++, M98095_BYTE1(coefs[i]));
270 snd_soc_component_write(component, eq_reg++, M98095_BYTE0(coefs[i]));
277 static void m98095_biquad_band(struct snd_soc_component *component, unsigned int dai,
295 snd_soc_component_write(component, bq_reg++, M98095_BYTE1(coefs[i]));
296 snd_soc_component_write(component, bq_reg++, M98095_BYTE0(coefs[i]));
353 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
354 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
358 snd_soc_component_update_bits(component, M98095_05F_LVL_MIC1, M98095_MICPRE_MASK,
367 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
368 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
377 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
378 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
382 snd_soc_component_update_bits(component, M98095_060_LVL_MIC2, M98095_MICPRE_MASK,
391 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
392 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
598 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
599 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
604 snd_soc_component_update_bits(component, w->reg, M98095_MICPRE_MASK,
607 snd_soc_component_update_bits(component, w->reg, M98095_MICPRE_MASK,
612 snd_soc_component_update_bits(component, w->reg, M98095_MICPRE_MASK, 0);
628 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
629 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
640 snd_soc_component_update_bits(component, w->reg,
646 snd_soc_component_update_bits(component, w->reg,
676 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
680 snd_soc_component_update_bits(component, w->reg,
684 snd_soc_component_update_bits(component, w->reg,
942 struct snd_soc_component *component = dai->component;
943 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
955 snd_soc_component_update_bits(component, M98095_02A_DAI1_FORMAT,
959 snd_soc_component_update_bits(component, M98095_02A_DAI1_FORMAT,
969 snd_soc_component_update_bits(component, M98095_027_DAI1_CLKMODE,
974 if (snd_soc_component_read(component, M98095_02A_DAI1_FORMAT) & M98095_DAI_MAS) {
976 dev_err(component->dev, "Invalid system clock frequency\n");
982 snd_soc_component_write(component, M98095_028_DAI1_CLKCFG_HI,
984 snd_soc_component_write(component, M98095_029_DAI1_CLKCFG_LO,
990 snd_soc_component_update_bits(component, M98095_02E_DAI1_FILTERS,
993 snd_soc_component_update_bits(component, M98095_02E_DAI1_FILTERS,
1003 struct snd_soc_component *component = dai->component;
1004 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1016 snd_soc_component_update_bits(component, M98095_034_DAI2_FORMAT,
1020 snd_soc_component_update_bits(component, M98095_034_DAI2_FORMAT,
1030 snd_soc_component_update_bits(component, M98095_031_DAI2_CLKMODE,
1035 if (snd_soc_component_read(component, M98095_034_DAI2_FORMAT) & M98095_DAI_MAS) {
1037 dev_err(component->dev, "Invalid system clock frequency\n");
1043 snd_soc_component_write(component, M98095_032_DAI2_CLKCFG_HI,
1045 snd_soc_component_write(component, M98095_033_DAI2_CLKCFG_LO,
1051 snd_soc_component_update_bits(component, M98095_038_DAI2_FILTERS,
1054 snd_soc_component_update_bits(component, M98095_038_DAI2_FILTERS,
1064 struct snd_soc_component *component = dai->component;
1065 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1077 snd_soc_component_update_bits(component, M98095_03E_DAI3_FORMAT,
1081 snd_soc_component_update_bits(component, M98095_03E_DAI3_FORMAT,
1091 snd_soc_component_update_bits(component, M98095_03B_DAI3_CLKMODE,
1096 if (snd_soc_component_read(component, M98095_03E_DAI3_FORMAT) & M98095_DAI_MAS) {
1098 dev_err(component->dev, "Invalid system clock frequency\n");
1104 snd_soc_component_write(component, M98095_03C_DAI3_CLKCFG_HI,
1106 snd_soc_component_write(component, M98095_03D_DAI3_CLKCFG_LO,
1112 snd_soc_component_update_bits(component, M98095_042_DAI3_FILTERS,
1115 snd_soc_component_update_bits(component, M98095_042_DAI3_FILTERS,
1124 struct snd_soc_component *component = dai->component;
1125 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1142 snd_soc_component_write(component, M98095_026_SYS_CLK, 0x10);
1144 snd_soc_component_write(component, M98095_026_SYS_CLK, 0x20);
1146 snd_soc_component_write(component, M98095_026_SYS_CLK, 0x30);
1148 dev_err(component->dev, "Invalid master clock frequency\n");
1161 struct snd_soc_component *component = codec_dai->component;
1162 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1174 snd_soc_component_write(component, M98095_028_DAI1_CLKCFG_HI,
1176 snd_soc_component_write(component, M98095_029_DAI1_CLKCFG_LO,
1186 dev_err(component->dev, "Clock mode unsupported");
1216 snd_soc_component_update_bits(component, M98095_02A_DAI1_FORMAT,
1220 snd_soc_component_write(component, M98095_02B_DAI1_CLOCK, M98095_DAI_BSEL64);
1229 struct snd_soc_component *component = codec_dai->component;
1230 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1242 snd_soc_component_write(component, M98095_032_DAI2_CLKCFG_HI,
1244 snd_soc_component_write(component, M98095_033_DAI2_CLKCFG_LO,
1254 dev_err(component->dev, "Clock mode unsupported");
1284 snd_soc_component_update_bits(component, M98095_034_DAI2_FORMAT,
1288 snd_soc_component_write(component, M98095_035_DAI2_CLOCK,
1298 struct snd_soc_component *component = codec_dai->component;
1299 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1311 snd_soc_component_write(component, M98095_03C_DAI3_CLKCFG_HI,
1313 snd_soc_component_write(component, M98095_03D_DAI3_CLKCFG_LO,
1323 dev_err(component->dev, "Clock mode unsupported");
1353 snd_soc_component_update_bits(component, M98095_03E_DAI3_FORMAT,
1357 snd_soc_component_write(component, M98095_03F_DAI3_CLOCK,
1364 static int max98095_set_bias_level(struct snd_soc_component *component,
1367 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1385 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
1395 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1399 dev_err(component->dev, "Failed to sync cache: %d\n", ret);
1404 snd_soc_component_update_bits(component, M98095_090_PWR_EN_IN,
1409 snd_soc_component_update_bits(component, M98095_090_PWR_EN_IN,
1494 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1495 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1528 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n",
1537 regsave = snd_soc_component_read(component, M98095_088_CFG_LEVEL);
1538 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
1541 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, M98095_SEG);
1542 m98095_eq_band(component, channel, 0, coef_set->band1);
1543 m98095_eq_band(component, channel, 1, coef_set->band2);
1544 m98095_eq_band(component, channel, 2, coef_set->band3);
1545 m98095_eq_band(component, channel, 3, coef_set->band4);
1546 m98095_eq_band(component, channel, 4, coef_set->band5);
1547 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, 0);
1551 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, regsave);
1558 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1559 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1569 static void max98095_handle_eq_pdata(struct snd_soc_component *component)
1571 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1624 ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls));
1626 dev_err(component->dev, "Failed to add EQ control: %d\n", ret);
1631 static int max98095_get_bq_channel(struct snd_soc_component *component,
1638 dev_err(component->dev, "Bad biquad channel name '%s'\n", name);
1645 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1646 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1648 int channel = max98095_get_bq_channel(component, kcontrol->id.name);
1679 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n",
1688 regsave = snd_soc_component_read(component, M98095_088_CFG_LEVEL);
1689 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, 0);
1692 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, M98095_SEG);
1693 m98095_biquad_band(component, channel, 0, coef_set->band1);
1694 m98095_biquad_band(component, channel, 1, coef_set->band2);
1695 snd_soc_component_update_bits(component, M98095_00F_HOST_CFG, M98095_SEG, 0);
1699 snd_soc_component_update_bits(component, M98095_088_CFG_LEVEL, regmask, regsave);
1706 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1707 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1708 int channel = max98095_get_bq_channel(component, kcontrol->id.name);
1720 static void max98095_handle_bq_pdata(struct snd_soc_component *component)
1722 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1776 ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls));
1778 dev_err(component->dev, "Failed to add Biquad control: %d\n", ret);
1781 static void max98095_handle_pdata(struct snd_soc_component *component)
1783 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1788 dev_dbg(component->dev, "No platform data\n");
1799 snd_soc_component_write(component, M98095_087_CFG_MIC, regval);
1803 max98095_handle_eq_pdata(component);
1807 max98095_handle_bq_pdata(component);
1812 struct snd_soc_component *component = data;
1813 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1819 value = snd_soc_component_read(component, M98095_007_JACK_AUTO_STS);
1850 static int max98095_jack_detect_enable(struct snd_soc_component *component)
1852 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1863 ret = snd_soc_component_write(component, M98095_08E_JACK_DC_SLEW, slew);
1865 dev_err(component->dev, "Failed to cfg auto detect %d\n", ret);
1870 ret = snd_soc_component_write(component, M98095_089_JACK_DET_AUTO, detect_enable);
1872 dev_err(component->dev, "Failed to cfg auto detect %d\n", ret);
1879 static int max98095_jack_detect_disable(struct snd_soc_component *component)
1884 ret = snd_soc_component_write(component, M98095_089_JACK_DET_AUTO, 0x0);
1886 dev_err(component->dev, "Failed to cfg auto detect %d\n", ret);
1893 int max98095_jack_detect(struct snd_soc_component *component,
1896 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1897 struct i2c_client *client = to_i2c_client(component->dev);
1907 max98095_jack_detect_enable(component);
1910 ret = snd_soc_component_update_bits(component, M98095_013_JACK_INT_EN,
1913 dev_err(component->dev, "Failed to cfg jack irqs %d\n", ret);
1917 max98095_report_jack(client->irq, component);
1923 static int max98095_suspend(struct snd_soc_component *component)
1925 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1928 max98095_jack_detect_disable(component);
1930 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
1935 static int max98095_resume(struct snd_soc_component *component)
1937 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1938 struct i2c_client *client = to_i2c_client(component->dev);
1940 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
1943 max98095_jack_detect_enable(component);
1944 max98095_report_jack(client->irq, component);
1954 static int max98095_reset(struct snd_soc_component *component)
1960 ret = snd_soc_component_write(component, M98095_00F_HOST_CFG, 0);
1962 dev_err(component->dev, "Failed to reset DSP: %d\n", ret);
1966 ret = snd_soc_component_write(component, M98095_097_PWR_SYS, 0);
1968 dev_err(component->dev, "Failed to reset component: %d\n", ret);
1975 ret = snd_soc_component_write(component, i, snd_soc_component_read(component, i));
1977 dev_err(component->dev, "Failed to reset: %d\n", ret);
1985 static int max98095_probe(struct snd_soc_component *component)
1987 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
1992 max98095->mclk = devm_clk_get(component->dev, "mclk");
1997 max98095_reset(component);
1999 client = to_i2c_client(component->dev);
2034 IRQF_ONESHOT, "max98095", component);
2036 dev_err(component->dev, "Failed to request IRQ: %d\n", ret);
2041 ret = snd_soc_component_read(component, M98095_0FF_REV_ID);
2043 dev_err(component->dev, "Failure reading hardware revision: %d\n",
2047 dev_info(component->dev, "Hardware revision: %c\n", ret - 0x40 + 'A');
2049 snd_soc_component_write(component, M98095_097_PWR_SYS, M98095_PWRSV);
2051 snd_soc_component_write(component, M98095_048_MIX_DAC_LR,
2054 snd_soc_component_write(component, M98095_049_MIX_DAC_M,
2057 snd_soc_component_write(component, M98095_092_PWR_EN_OUT, M98095_SPK_SPREADSPECTRUM);
2058 snd_soc_component_write(component, M98095_045_CFG_DSP, M98095_DSPNORMAL);
2059 snd_soc_component_write(component, M98095_04E_CFG_HP, M98095_HPNORMAL);
2061 snd_soc_component_write(component, M98095_02C_DAI1_IOCFG,
2064 snd_soc_component_write(component, M98095_036_DAI2_IOCFG,
2067 snd_soc_component_write(component, M98095_040_DAI3_IOCFG,
2070 max98095_handle_pdata(component);
2073 snd_soc_component_update_bits(component, M98095_097_PWR_SYS, M98095_SHDNRUN,
2080 free_irq(client->irq, component);
2085 static void max98095_remove(struct snd_soc_component *component)
2087 struct max98095_priv *max98095 = snd_soc_component_get_drvdata(component);
2088 struct i2c_client *client = to_i2c_client(component->dev);
2091 max98095_jack_detect_disable(component);
2094 free_irq(client->irq, component);