Lines Matching defs:bclk
2765 int lrclk, bclk, mode, base;
2770 bclk = 0;
2808 bclk |= MADERA_AIF1_BCLK_MSTR;
2811 bclk |= MADERA_AIF1_BCLK_MSTR;
2824 bclk |= MADERA_AIF1_BCLK_INV;
2828 bclk |= MADERA_AIF1_BCLK_INV;
2841 bclk);
3077 int base, int bclk, int lrclk, int frame)
3082 if (bclk != (val & MADERA_AIF1_BCLK_FREQ_MASK))
3114 int bclk, lrclk, wl, frame, bclk_target, num_rates;
3155 bclk = i;
3165 lrclk = rates[bclk] / rate;
3168 rates[bclk], rates[bclk] / lrclk);
3172 reconfig = madera_aif_cfg_changed(component, base, bclk, lrclk, frame);
3196 MADERA_AIF1_BCLK_FREQ_MASK, bclk);