Lines Matching refs:cx2072x
31 #include "cx2072x.h"
93 * cx2072x register cache.
583 static int cx2072x_config_pll(struct cx2072x_priv *cx2072x)
585 struct device *dev = cx2072x->dev;
594 unsigned int sample_rate = cx2072x->sample_rate;
621 pre_div = get_div_from_mclk(cx2072x->mclk_rate);
622 pll_input = cx2072x->mclk_rate / pre_div;
636 regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST4,
640 regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST7, 0x100);
643 regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST6,
645 regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST7,
650 regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST8, int_div);
655 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST16, 0x00);
658 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST16,
660 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST17,
662 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST18,
664 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST19, 0x01);
665 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST20, 0x02);
666 regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_TEST16,
673 static int cx2072x_config_i2spcm(struct cx2072x_priv *cx2072x)
675 struct device *dev = cx2072x->dev;
682 int frame_len = cx2072x->frame_size;
683 int sample_size = cx2072x->sample_size;
697 const unsigned int fmt = cx2072x->dai_fmt;
804 if (cx2072x->en_aec_ref)
816 if (cx2072x->en_aec_ref)
834 bclk_rate = cx2072x->sample_rate * frame_len;
838 regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL5, 0);
853 regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL1, reg1.ulval);
854 regmap_update_bits(cx2072x->regmap, CX2072X_I2SPCM_CONTROL2, 0xffffffc0,
856 regmap_update_bits(cx2072x->regmap, CX2072X_I2SPCM_CONTROL3, 0xffffffc0,
858 regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL4, reg4.ulval);
859 regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL6, reg6.ulval);
860 regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL5, reg5.ulval);
862 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2,
872 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
876 regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST0,
881 regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST0,
918 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
933 if (cx2072x->mclk_rate == 0) {
938 if (cx2072x->bclk_ratio)
939 frame_size = cx2072x->bclk_ratio;
958 cx2072x->frame_size = frame_size;
959 cx2072x->sample_size = sample_size;
960 cx2072x->sample_rate = sample_rate;
963 cx2072x->en_aec_ref = true;
964 dev_dbg(cx2072x->dev, "enables aec reference\n");
965 regmap_write(cx2072x->regmap,
969 if (cx2072x->pll_changed) {
970 cx2072x_config_pll(cx2072x);
971 cx2072x->pll_changed = false;
974 if (cx2072x->i2spcm_changed) {
975 cx2072x_config_i2spcm(cx2072x);
976 cx2072x->i2spcm_changed = false;
986 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
988 cx2072x->bclk_ratio = ratio;
996 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
998 if (clk_set_rate(cx2072x->mclk, freq)) {
1003 cx2072x->mclk_rate = freq;
1010 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1050 cx2072x->dai_fmt = fmt;
1354 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1359 regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 0);
1361 regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 3);
1376 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1380 regmap_write(cx2072x->regmap, CX2072X_GPIO_STICKY_MASK, 0x1f);
1383 regmap_write(cx2072x->regmap, CX2072X_UM_INTERRUPT_CRTL_E, 0x12 << 24);
1386 regmap_write(cx2072x->regmap, CX2072X_PORTA_UNSOLICITED_RESPONSE, 0x80);
1389 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST15, 0x73);
1392 regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST12, 0x300);
1395 regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST1, 0);
1408 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1410 regmap_write(cx2072x->regmap, CX2072X_UM_INTERRUPT_CRTL_E, 0);
1411 regmap_write(cx2072x->regmap, CX2072X_PORTA_UNSOLICITED_RESPONSE, 0);
1417 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1422 mutex_lock(&cx2072x->lock);
1424 regmap_read(cx2072x->regmap, CX2072X_PORTA_PIN_SENSE, &jack);
1426 regmap_read(cx2072x->regmap, CX2072X_DIGITAL_TEST11, &type);
1446 regmap_write(cx2072x->regmap, CX2072X_UM_INTERRUPT_CRTL_E, 0x12 << 24);
1448 mutex_unlock(&cx2072x->lock);
1466 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1474 if (!cx2072x->jack_gpio.gpiod_dev) {
1475 cx2072x->jack_gpio = cx2072x_jack_gpio;
1476 cx2072x->jack_gpio.gpiod_dev = codec->dev;
1477 cx2072x->jack_gpio.data = codec;
1478 err = snd_soc_jack_add_gpios(jack, 1, &cx2072x->jack_gpio);
1480 cx2072x->jack_gpio.gpiod_dev = NULL;
1491 struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1493 cx2072x->codec = codec;
1505 regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 0);
1507 regmap_multi_reg_write(cx2072x->regmap, cx2072x_reg_init,
1511 regmap_update_bits(cx2072x->regmap, CX2072X_PORTC_PIN_CTRL,
1514 regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2,
1517 regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 3);
1547 struct cx2072x_priv *cx2072x =
1550 cx2072x->en_aec_ref = true;
1558 .name = "cx2072x-hifi",
1578 .name = "cx2072x-dsp",
1591 .name = "cx2072x-aec",
1619 struct cx2072x_priv *cx2072x = dev_get_drvdata(dev);
1621 clk_disable_unprepare(cx2072x->mclk);
1627 struct cx2072x_priv *cx2072x = dev_get_drvdata(dev);
1629 return clk_prepare_enable(cx2072x->mclk);
1635 struct cx2072x_priv *cx2072x;
1639 cx2072x = devm_kzalloc(&i2c->dev, sizeof(struct cx2072x_priv),
1641 if (!cx2072x)
1644 cx2072x->regmap = devm_regmap_init(&i2c->dev, NULL, i2c,
1646 if (IS_ERR(cx2072x->regmap))
1647 return PTR_ERR(cx2072x->regmap);
1649 mutex_init(&cx2072x->lock);
1651 i2c_set_clientdata(i2c, cx2072x);
1653 cx2072x->dev = &i2c->dev;
1654 cx2072x->pll_changed = true;
1655 cx2072x->i2spcm_changed = true;
1656 cx2072x->bclk_ratio = 0;
1658 cx2072x->mclk = devm_clk_get(cx2072x->dev, "mclk");
1659 if (IS_ERR(cx2072x->mclk)) {
1660 dev_err(cx2072x->dev, "Failed to get MCLK\n");
1661 return PTR_ERR(cx2072x->mclk);
1664 regmap_read(cx2072x->regmap, CX2072X_VENDOR_ID, &ven_id);
1665 regmap_read(cx2072x->regmap, CX2072X_REVISION_ID, &rev_id);
1667 dev_info(cx2072x->dev, "codec version: %08x,%08x\n", ven_id, rev_id);
1669 ret = devm_snd_soc_register_component(cx2072x->dev,
1676 pm_runtime_use_autosuspend(cx2072x->dev);
1677 pm_runtime_enable(cx2072x->dev);
1712 .name = "cx2072x",
1723 MODULE_DESCRIPTION("ASoC cx2072x Codec Driver");