Lines Matching refs:x00
405 { 0x02, 0x00 }, /* Power Control */
408 { 0x05, 0x00 }, /* ADC Control & DAC De-Emphasis */
410 { 0x07, 0x00 }, /* DAC Channel Mute */
411 { 0x08, 0x00 }, /* Volume Control AOUT1 */
412 { 0x09, 0x00 }, /* Volume Control AOUT2 */
413 { 0x0a, 0x00 }, /* Volume Control AOUT3 */
414 { 0x0b, 0x00 }, /* Volume Control AOUT4 */
415 { 0x0c, 0x00 }, /* Volume Control AOUT5 */
416 { 0x0d, 0x00 }, /* Volume Control AOUT6 */
417 { 0x0e, 0x00 }, /* Volume Control AOUT7 */
418 { 0x0f, 0x00 }, /* Volume Control AOUT8 */
419 { 0x10, 0x00 }, /* DAC Channel Invert */
420 { 0x11, 0x00 }, /* Volume Control AIN1 */
421 { 0x12, 0x00 }, /* Volume Control AIN2 */
422 { 0x13, 0x00 }, /* Volume Control AIN3 */
423 { 0x14, 0x00 }, /* Volume Control AIN4 */
424 { 0x15, 0x00 }, /* Volume Control AIN5 */
425 { 0x16, 0x00 }, /* Volume Control AIN6 */
426 { 0x17, 0x00 }, /* ADC Channel Invert */
427 { 0x18, 0x00 }, /* Status Control */
428 { 0x1a, 0x00 }, /* Status Mask */
429 { 0x1b, 0x00 }, /* MUTEC Pin Control */
595 if (((val & CS42XX8_CHIPID_CHIP_ID_MASK) >> 4) != 0x00) {