Lines Matching refs:cs42l42
3 * cs42l42.c -- CS42L42 ALSA SoC audio driver
34 #include <dt-bindings/sound/cs42l42.h>
36 #include "cs42l42.h"
508 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
518 regcache_cache_only(cs42l42->regmap, false);
519 regcache_sync(cs42l42->regmap);
521 ARRAY_SIZE(cs42l42->supplies),
522 cs42l42->supplies);
533 regcache_cache_only(cs42l42->regmap, true);
534 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies),
535 cs42l42->supplies);
544 struct cs42l42_private *cs42l42 =
547 cs42l42->component = component;
603 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
608 if (pll_ratio_table[i].sclk == cs42l42->sclk) {
628 fsync = cs42l42->sclk / cs42l42->srate;
629 if (((fsync * cs42l42->srate) != cs42l42->sclk)
633 cs42l42->sclk,
634 cs42l42->srate);
801 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
805 cs42l42->srate = params_rate(params);
831 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
833 cs42l42->sclk = freq;
903 .name = "cs42l42",
921 static void cs42l42_process_hs_type_detect(struct cs42l42_private *cs42l42)
927 regmap_update_bits(cs42l42->regmap,
935 regmap_update_bits(cs42l42->regmap,
947 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status);
949 cs42l42->hs_type = (hs_det_status & CS42L42_HSDET_TYPE_MASK) >>
953 if ((cs42l42->hs_type == CS42L42_PLUG_CTIA) ||
954 (cs42l42->hs_type == CS42L42_PLUG_OMTP)) {
956 regmap_update_bits(cs42l42->regmap,
968 regmap_update_bits(cs42l42->regmap,
975 (cs42l42->bias_thresholds[0] <<
979 regmap_update_bits(cs42l42->regmap,
991 regmap_update_bits(cs42l42->regmap,
1000 msleep(cs42l42->btn_det_init_dbnce);
1003 regmap_read(cs42l42->regmap, CS42L42_DET_INT_STATUS2,
1007 regmap_update_bits(cs42l42->regmap,
1021 regmap_update_bits(cs42l42->regmap,
1031 regmap_update_bits(cs42l42->regmap,
1045 regmap_update_bits(cs42l42->regmap,
1057 static void cs42l42_init_hs_type_detect(struct cs42l42_private *cs42l42)
1060 regmap_update_bits(cs42l42->regmap,
1072 regmap_update_bits(cs42l42->regmap,
1082 regmap_update_bits(cs42l42->regmap,
1094 regmap_update_bits(cs42l42->regmap,
1105 regmap_update_bits(cs42l42->regmap,
1119 regmap_update_bits(cs42l42->regmap,
1129 msleep(cs42l42->hs_bias_ramp_time);
1132 regmap_update_bits(cs42l42->regmap,
1140 regmap_update_bits(cs42l42->regmap,
1152 static void cs42l42_cancel_hs_type_detect(struct cs42l42_private *cs42l42)
1155 regmap_update_bits(cs42l42->regmap,
1169 regmap_update_bits(cs42l42->regmap,
1179 regmap_update_bits(cs42l42->regmap,
1191 regmap_update_bits(cs42l42->regmap,
1203 static void cs42l42_handle_button_press(struct cs42l42_private *cs42l42)
1209 regmap_update_bits(cs42l42->regmap,
1222 usleep_range(cs42l42->btn_det_event_dbnce * 1000,
1223 cs42l42->btn_det_event_dbnce * 2000);
1229 regmap_update_bits(cs42l42->regmap,
1236 (cs42l42->bias_thresholds[bias_level] <<
1239 regmap_read(cs42l42->regmap, CS42L42_DET_STATUS2,
1246 dev_dbg(cs42l42->component->dev, "Function C button press\n");
1249 dev_dbg(cs42l42->component->dev, "Function B button press\n");
1252 dev_dbg(cs42l42->component->dev, "Function D button press\n");
1255 dev_dbg(cs42l42->component->dev, "Function A button press\n");
1260 regmap_update_bits(cs42l42->regmap,
1267 (cs42l42->bias_thresholds[0] << CS42L42_HS_DET_LEVEL_SHIFT));
1270 regmap_read(cs42l42->regmap, CS42L42_DET_INT_STATUS2,
1274 regmap_update_bits(cs42l42->regmap,
1323 struct cs42l42_private *cs42l42 = (struct cs42l42_private *)data;
1324 struct snd_soc_component *component = cs42l42->component;
1333 regmap_read(cs42l42->regmap, irq_params_table[i].status_addr,
1335 regmap_read(cs42l42->regmap, irq_params_table[i].mask_addr,
1355 cs42l42_process_hs_type_detect(cs42l42);
1358 cs42l42->hs_type);
1366 if (cs42l42->plug_state != CS42L42_TS_PLUG) {
1367 cs42l42->plug_state = CS42L42_TS_PLUG;
1368 cs42l42_init_hs_type_detect(cs42l42);
1373 if (cs42l42->plug_state != CS42L42_TS_UNPLUG) {
1374 cs42l42->plug_state = CS42L42_TS_UNPLUG;
1375 cs42l42_cancel_hs_type_detect(cs42l42);
1382 if (cs42l42->plug_state != CS42L42_TS_TRANS)
1383 cs42l42->plug_state = CS42L42_TS_TRANS;
1398 cs42l42_handle_button_press(cs42l42);
1406 static void cs42l42_set_interrupt_masks(struct cs42l42_private *cs42l42)
1408 regmap_update_bits(cs42l42->regmap, CS42L42_ADC_OVFL_INT_MASK,
1412 regmap_update_bits(cs42l42->regmap, CS42L42_MIXER_INT_MASK,
1422 regmap_update_bits(cs42l42->regmap, CS42L42_SRC_INT_MASK,
1432 regmap_update_bits(cs42l42->regmap, CS42L42_ASP_RX_INT_MASK,
1444 regmap_update_bits(cs42l42->regmap, CS42L42_ASP_TX_INT_MASK,
1454 regmap_update_bits(cs42l42->regmap, CS42L42_CODEC_INT_MASK,
1460 regmap_update_bits(cs42l42->regmap, CS42L42_SRCPL_INT_MASK,
1470 regmap_update_bits(cs42l42->regmap, CS42L42_DET_INT1_MASK,
1478 regmap_update_bits(cs42l42->regmap, CS42L42_DET_INT2_MASK,
1490 regmap_update_bits(cs42l42->regmap, CS42L42_VPMON_INT_MASK,
1494 regmap_update_bits(cs42l42->regmap, CS42L42_PLL_LOCK_INT_MASK,
1498 regmap_update_bits(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK,
1509 static void cs42l42_setup_hs_type_detect(struct cs42l42_private *cs42l42)
1513 cs42l42->hs_type = CS42L42_PLUG_INVALID;
1516 regmap_update_bits(cs42l42->regmap, CS42L42_MIC_DET_CTL1,
1522 (cs42l42->bias_thresholds[0] <<
1526 regmap_update_bits(cs42l42->regmap,
1532 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1535 regmap_update_bits(cs42l42->regmap, CS42L42_TIPSENSE_CTL,
1540 (!cs42l42->ts_inv << CS42L42_TIP_SENSE_INV_SHIFT) |
1544 regmap_read(cs42l42->regmap,
1547 cs42l42->plug_state = (((char) reg) &
1560 struct cs42l42_private *cs42l42)
1572 cs42l42->ts_inv = val;
1578 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1581 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1595 cs42l42->ts_dbnc_rise = val;
1601 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1604 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1607 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1609 (cs42l42->ts_dbnc_rise <<
1623 cs42l42->ts_dbnc_fall = val;
1629 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
1632 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
1635 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1637 (cs42l42->ts_dbnc_fall <<
1643 cs42l42->btn_det_init_dbnce = val;
1648 cs42l42->btn_det_init_dbnce =
1652 cs42l42->btn_det_init_dbnce =
1659 cs42l42->btn_det_event_dbnce = val;
1663 cs42l42->btn_det_event_dbnce =
1667 cs42l42->btn_det_event_dbnce =
1676 cs42l42->bias_thresholds[i] = thresholds[i];
1681 cs42l42->bias_thresholds[i] = threshold_defaults[i];
1686 cs42l42->bias_thresholds[i] = threshold_defaults[i];
1693 cs42l42->hs_bias_ramp_rate = val;
1694 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME0;
1697 cs42l42->hs_bias_ramp_rate = val;
1698 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME1;
1701 cs42l42->hs_bias_ramp_rate = val;
1702 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
1705 cs42l42->hs_bias_ramp_rate = val;
1706 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME3;
1712 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
1713 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
1716 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
1717 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
1720 regmap_update_bits(cs42l42->regmap, CS42L42_HS_BIAS_CTL,
1722 (cs42l42->hs_bias_ramp_rate <<
1731 struct cs42l42_private *cs42l42;
1736 cs42l42 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l42_private),
1738 if (!cs42l42)
1741 i2c_set_clientdata(i2c_client, cs42l42);
1743 cs42l42->regmap = devm_regmap_init_i2c(i2c_client, &cs42l42_regmap);
1744 if (IS_ERR(cs42l42->regmap)) {
1745 ret = PTR_ERR(cs42l42->regmap);
1750 for (i = 0; i < ARRAY_SIZE(cs42l42->supplies); i++)
1751 cs42l42->supplies[i].supply = cs42l42_supply_names[i];
1754 ARRAY_SIZE(cs42l42->supplies),
1755 cs42l42->supplies);
1762 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l42->supplies),
1763 cs42l42->supplies);
1771 cs42l42->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
1773 if (IS_ERR(cs42l42->reset_gpio)) {
1774 ret = PTR_ERR(cs42l42->reset_gpio);
1778 if (cs42l42->reset_gpio) {
1780 gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
1789 "cs42l42", cs42l42);
1797 ret = regmap_read(cs42l42->regmap, CS42L42_DEVID_AB, ®);
1800 ret = regmap_read(cs42l42->regmap, CS42L42_DEVID_CD, ®);
1803 ret = regmap_read(cs42l42->regmap, CS42L42_DEVID_E, ®);
1814 ret = regmap_read(cs42l42->regmap, CS42L42_REVID, ®);
1824 regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL1,
1840 ret = cs42l42_handle_device_data(&i2c_client->dev, cs42l42);
1845 cs42l42_setup_hs_type_detect(cs42l42);
1848 cs42l42_set_interrupt_masks(cs42l42);
1858 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies),
1859 cs42l42->supplies);
1865 struct cs42l42_private *cs42l42 = i2c_get_clientdata(i2c_client);
1868 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
1876 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
1878 regcache_cache_only(cs42l42->regmap, true);
1879 regcache_mark_dirty(cs42l42->regmap);
1882 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
1885 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies),
1886 cs42l42->supplies);
1893 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
1897 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l42->supplies),
1898 cs42l42->supplies);
1905 gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
1908 regcache_cache_only(cs42l42->regmap, false);
1909 regcache_sync(cs42l42->regmap);
1921 { .compatible = "cirrus,cs42l42", },
1928 {"cs42l42", 0},
1936 .name = "cs42l42",