Lines Matching defs:cs35l34
3 * cs35l34.c -- CS35l34 ALSA SoC audio driver
32 #include <sound/cs35l34.h>
34 #include "cs35l34.h"
602 struct cs35l34_private *cs35l34 = snd_soc_component_get_drvdata(component);
608 cs35l34->mclk_int = freq;
612 cs35l34->mclk_int = freq;
616 cs35l34->mclk_int = freq;
620 cs35l34->mclk_int = freq / 2;
624 cs35l34->mclk_int = freq / 2;
628 cs35l34->mclk_int = freq / 2;
632 cs35l34->mclk_int = 0;
635 regmap_update_bits(cs35l34->regmap, CS35L34_MCLK_CTL,
650 .name = "cs35l34",
670 static int cs35l34_boost_inductor(struct cs35l34_private *cs35l34,
673 struct snd_soc_component *component = cs35l34->component;
677 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x24);
678 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x24);
679 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
681 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 0);
684 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x20);
685 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x20);
686 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
688 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 1);
691 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x20);
692 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x20);
693 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
695 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 2);
698 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x19);
699 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x25);
700 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
702 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 3);
715 struct cs35l34_private *cs35l34 = snd_soc_component_get_drvdata(component);
720 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
726 regmap_write(cs35l34->regmap, CS35L34_PWRCTL2, 0xFD);
727 regmap_write(cs35l34->regmap, CS35L34_PWRCTL3, 0x1F);
730 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
734 if (cs35l34->pdata.boost_peak)
735 regmap_update_bits(cs35l34->regmap, CS35L34_BST_PEAK_I,
737 cs35l34->pdata.boost_peak);
739 if (cs35l34->pdata.gain_zc_disable)
740 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
743 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
746 if (cs35l34->pdata.aif_half_drv)
747 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_CLK_CTL,
750 if (cs35l34->pdata.digsft_disable)
751 regmap_update_bits(cs35l34->regmap, CS35L34_AMP_DIG_VOL_CTL,
754 if (cs35l34->pdata.amp_inv)
755 regmap_update_bits(cs35l34->regmap, CS35L34_AMP_DIG_VOL_CTL,
758 if (cs35l34->pdata.boost_ind)
759 ret = cs35l34_boost_inductor(cs35l34, cs35l34->pdata.boost_ind);
761 if (cs35l34->pdata.i2s_sdinloc)
762 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_I2S_CTL,
764 cs35l34->pdata.i2s_sdinloc << CS35L34_I2S_LOC_SHIFT);
766 if (cs35l34->pdata.tdm_rising_edge)
767 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_TDM_CTL,
861 struct cs35l34_private *cs35l34 = data;
862 struct snd_soc_component *component = cs35l34->component;
868 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_4, &sticky4);
869 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_3, &sticky3);
870 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_2, &sticky2);
871 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_1, &sticky1);
873 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_4, &mask4);
874 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_3, &mask3);
875 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_2, &mask2);
876 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_1, &mask1);
882 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_1, ¤t1);
890 regmap_update_bits(cs35l34->regmap,
893 regmap_update_bits(cs35l34->regmap,
897 regmap_update_bits(cs35l34->regmap,
914 regmap_update_bits(cs35l34->regmap,
917 regmap_update_bits(cs35l34->regmap,
921 regmap_update_bits(cs35l34->regmap,
934 regmap_update_bits(cs35l34->regmap,
937 regmap_update_bits(cs35l34->regmap,
941 regmap_update_bits(cs35l34->regmap,
954 regmap_update_bits(cs35l34->regmap,
957 regmap_update_bits(cs35l34->regmap,
961 regmap_update_bits(cs35l34->regmap,
969 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL2,
971 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL1,
977 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL2,
979 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL1,
994 struct cs35l34_private *cs35l34;
1002 cs35l34 = devm_kzalloc(&i2c_client->dev, sizeof(*cs35l34), GFP_KERNEL);
1003 if (!cs35l34)
1006 i2c_set_clientdata(i2c_client, cs35l34);
1007 cs35l34->regmap = devm_regmap_init_i2c(i2c_client, &cs35l34_regmap);
1008 if (IS_ERR(cs35l34->regmap)) {
1009 ret = PTR_ERR(cs35l34->regmap);
1014 cs35l34->num_core_supplies = ARRAY_SIZE(cs35l34_core_supplies);
1016 cs35l34->core_supplies[i].supply = cs35l34_core_supplies[i];
1019 cs35l34->num_core_supplies,
1020 cs35l34->core_supplies);
1027 ret = regulator_bulk_enable(cs35l34->num_core_supplies,
1028 cs35l34->core_supplies);
1036 cs35l34->pdata = *pdata;
1049 cs35l34->pdata = *pdata;
1054 "cs35l34", cs35l34);
1058 cs35l34->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
1060 if (IS_ERR(cs35l34->reset_gpio))
1061 return PTR_ERR(cs35l34->reset_gpio);
1063 gpiod_set_value_cansleep(cs35l34->reset_gpio, 1);
1067 ret = regmap_read(cs35l34->regmap, CS35L34_DEVID_AB, ®);
1070 ret = regmap_read(cs35l34->regmap, CS35L34_DEVID_CD, ®);
1072 ret = regmap_read(cs35l34->regmap, CS35L34_DEVID_E, ®);
1083 ret = regmap_read(cs35l34->regmap, CS35L34_REV_ID, ®);
1094 regmap_update_bits(cs35l34->regmap, CS35L34_INT_MASK_1,
1098 regmap_update_bits(cs35l34->regmap, CS35L34_INT_MASK_3,
1117 regulator_bulk_disable(cs35l34->num_core_supplies,
1118 cs35l34->core_supplies);
1125 struct cs35l34_private *cs35l34 = i2c_get_clientdata(client);
1127 gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1130 regulator_bulk_disable(cs35l34->num_core_supplies,
1131 cs35l34->core_supplies);
1138 struct cs35l34_private *cs35l34 = dev_get_drvdata(dev);
1141 ret = regulator_bulk_enable(cs35l34->num_core_supplies,
1142 cs35l34->core_supplies);
1150 regcache_cache_only(cs35l34->regmap, false);
1152 gpiod_set_value_cansleep(cs35l34->reset_gpio, 1);
1155 ret = regcache_sync(cs35l34->regmap);
1162 regcache_cache_only(cs35l34->regmap, true);
1163 regulator_bulk_disable(cs35l34->num_core_supplies,
1164 cs35l34->core_supplies);
1171 struct cs35l34_private *cs35l34 = dev_get_drvdata(dev);
1173 regcache_cache_only(cs35l34->regmap, true);
1174 regcache_mark_dirty(cs35l34->regmap);
1176 gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1178 regulator_bulk_disable(cs35l34->num_core_supplies,
1179 cs35l34->core_supplies);
1191 {.compatible = "cirrus,cs35l34"},
1197 {"cs35l34", 0},
1204 .name = "cs35l34",