Lines Matching defs:PW_MGMT3
26 #define PW_MGMT3 0x02 /* Power Management 3 */
57 /* PW_MGMT3 */
195 SND_SOC_DAPM_DAC("DAC1", NULL, PW_MGMT3, 0, 0),
196 SND_SOC_DAPM_DAC("DAC2", NULL, PW_MGMT3, 1, 0),
197 SND_SOC_DAPM_DAC("DAC3", NULL, PW_MGMT3, 2, 0),
198 SND_SOC_DAPM_DAC("DAC4", NULL, PW_MGMT3, 3, 0),
199 SND_SOC_DAPM_DAC("DAC5", NULL, PW_MGMT3, 4, 0),
200 SND_SOC_DAPM_DAC("DAC6", NULL, PW_MGMT3, 5, 0),
481 * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
494 mgmt3 = snd_soc_component_read(component, PW_MGMT3);
497 snd_soc_component_write(component, PW_MGMT3, mgmt3);
509 * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks