Lines Matching defs:adau
27 #include "adau-utils.h"
76 struct adau *adau = snd_soc_component_get_drvdata(component);
79 adau->pll_regs[5] = 1;
81 adau->pll_regs[5] = 0;
84 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
89 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
90 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
94 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
106 struct adau *adau = snd_soc_component_get_drvdata(component);
115 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
117 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
191 struct adau *adau = snd_soc_component_get_drvdata(component);
204 adau->dsp_bypass[stream] = false;
207 val = (adau->tdm_slot[stream] * 2) + 1;
208 adau->dsp_bypass[stream] = true;
235 struct adau *adau = snd_soc_component_get_drvdata(component);
246 ret = regmap_read(adau->regmap, reg, &val);
325 static bool adau17x1_has_dsp(struct adau *adau)
327 switch (adau->type) {
337 static bool adau17x1_has_safeload(struct adau *adau)
339 switch (adau->type) {
352 struct adau *adau = snd_soc_component_get_drvdata(component);
358 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs);
363 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
364 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
368 adau->pll_freq = freq_out;
377 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
386 if (!adau->mclk)
396 switch (adau->clk_src) {
408 adau->sysclk = freq;
420 adau->clk_src = clk_id;
428 struct adau *adau = snd_soc_dai_get_drvdata(dai);
455 clk_get_rate(adau->mclk), pll_rate);
462 struct adau *adau = snd_soc_component_get_drvdata(component);
467 switch (adau->clk_src) {
474 freq = adau->pll_freq;
477 freq = adau->sysclk;
517 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
519 if (adau17x1_has_dsp(adau)) {
520 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
521 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
524 if (adau->sigmadsp) {
530 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
547 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
554 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
561 adau->master = true;
565 adau->master = false;
615 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0);
616 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1);
618 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
626 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
646 if (adau->type == ADAU1361)
657 if (adau->type == ADAU1761)
672 if (adau->type == ADAU1361)
684 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
688 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
692 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
696 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
705 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
709 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
713 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
717 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
723 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
725 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
727 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
729 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
732 if (!adau17x1_has_dsp(adau))
735 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
736 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
737 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
740 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
741 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
742 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
751 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
753 if (adau->sigmadsp)
754 return sigmadsp_restrict_params(adau->sigmadsp, substream);
772 struct adau *adau = snd_soc_component_get_drvdata(component);
782 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
863 struct adau *adau = snd_soc_component_get_drvdata(component);
872 if (adau->sigmadsp->current_samplerate == rate)
877 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
881 ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run);
885 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
886 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
887 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
889 ret = sigmadsp_setup(adau->sigmadsp, rate);
891 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
894 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
895 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run);
906 struct adau *adau = snd_soc_component_get_drvdata(component);
918 if (adau17x1_has_dsp(adau)) {
924 if (!adau->sigmadsp)
927 ret = sigmadsp_attach(adau->sigmadsp, component);
942 struct adau *adau = snd_soc_component_get_drvdata(component);
950 if (adau17x1_has_dsp(adau)) {
958 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)
967 struct adau *adau = snd_soc_component_get_drvdata(component);
969 if (adau->switch_mode)
970 adau->switch_mode(component->dev);
972 regcache_sync(adau->regmap);
1032 struct adau *adau;
1038 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
1039 if (!adau)
1042 adau->mclk = devm_clk_get(dev, "mclk");
1043 if (IS_ERR(adau->mclk)) {
1044 if (PTR_ERR(adau->mclk) != -ENOENT)
1045 return PTR_ERR(adau->mclk);
1047 adau->mclk = NULL;
1048 } else if (adau->mclk) {
1049 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;
1056 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024,
1057 adau->pll_regs);
1061 ret = clk_prepare_enable(adau->mclk);
1066 adau->regmap = regmap;
1067 adau->switch_mode = switch_mode;
1068 adau->type = type;
1070 dev_set_drvdata(dev, adau);
1073 if (adau17x1_has_safeload(adau)) {
1074 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1077 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1080 if (IS_ERR(adau->sigmadsp)) {
1082 PTR_ERR(adau->sigmadsp));
1083 adau->sigmadsp = NULL;
1096 struct adau *adau = dev_get_drvdata(dev);
1098 if (adau->mclk)
1099 clk_disable_unprepare(adau->mclk);