Lines Matching refs:value
59 (0 << 1) /* Load sample regardless of validity bit value */
525 memcpy(uvalue->value.iec958.status, ch_stat->data,
554 memset(uvalue->value.iec958.status, 0xff,
555 sizeof(uvalue->value.iec958.status));
601 memcpy(uvalue->value.iec958.subcode, user_data->data,
632 uinfo->value.integer.min = 0;
633 uinfo->value.integer.max = 1;
650 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled
661 uvalue->value.integer.value[0] = ctrl->ulock;
680 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled
693 uvalue->value.integer.value[0] = ctrl->badf;
746 uvalue->value.integer.value[0] = ctrl->signal;
756 uinfo->value.integer.min = 0;
757 uinfo->value.integer.max = 192000;
773 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled
781 ucontrol->value.integer.value[0] = 0;
786 ucontrol->value.integer.value[0] = 0;
792 ucontrol->value.integer.value[0] = rate / (32 * SPDIFRX_RSR_IFS(val));
1013 * called lead to invalid value returned for signal. Thus, configure