Lines Matching defs:hdspm
141 #include <sound/hdspm.h>
956 struct hdspm *hdspm;
982 struct hdspm {
1090 struct hdspm *hdspm);
1092 struct hdspm *hdspm);
1094 static inline void snd_hdspm_initialize_midi_flush(struct hdspm *hdspm);
1095 static inline int hdspm_get_pll_freq(struct hdspm *hdspm);
1096 static int hdspm_update_simple_mixer_controls(struct hdspm *hdspm);
1097 static int hdspm_autosync_ref(struct hdspm *hdspm);
1098 static int hdspm_set_toggle_setting(struct hdspm *hdspm, u32 regmask, int out);
1099 static int snd_hdspm_set_defaults(struct hdspm *hdspm);
1100 static int hdspm_system_clock_mode(struct hdspm *hdspm);
1101 static void hdspm_set_channel_dma_addr(struct hdspm *hdspm,
1105 static int hdspm_aes_sync_check(struct hdspm *hdspm, int idx);
1106 static int hdspm_wc_sync_check(struct hdspm *hdspm);
1107 static int hdspm_tco_sync_check(struct hdspm *hdspm);
1108 static int hdspm_sync_in_sync_check(struct hdspm *hdspm);
1110 static int hdspm_get_aes_sample_rate(struct hdspm *hdspm, int index);
1111 static int hdspm_get_tco_sample_rate(struct hdspm *hdspm);
1112 static int hdspm_get_wc_sample_rate(struct hdspm *hdspm);
1126 static bool hdspm_is_raydat_or_aio(struct hdspm *hdspm)
1128 return ((AIO == hdspm->io_type) || (RayDAT == hdspm->io_type));
1135 static inline void hdspm_write(struct hdspm * hdspm, unsigned int reg,
1138 writel(val, hdspm->iobase + reg);
1141 static inline unsigned int hdspm_read(struct hdspm * hdspm, unsigned int reg)
1143 return readl(hdspm->iobase + reg);
1150 static inline int hdspm_read_in_gain(struct hdspm * hdspm, unsigned int chan,
1156 return hdspm->mixer->ch[chan].in[in];
1159 static inline int hdspm_read_pb_gain(struct hdspm * hdspm, unsigned int chan,
1164 return hdspm->mixer->ch[chan].pb[pb];
1167 static int hdspm_write_in_gain(struct hdspm *hdspm, unsigned int chan,
1173 hdspm_write(hdspm,
1176 (hdspm->mixer->ch[chan].in[in] = data & 0xFFFF));
1180 static int hdspm_write_pb_gain(struct hdspm *hdspm, unsigned int chan,
1186 hdspm_write(hdspm,
1189 (hdspm->mixer->ch[chan].pb[pb] = data & 0xFFFF));
1195 static inline void snd_hdspm_enable_in(struct hdspm * hdspm, int i, int v)
1197 hdspm_write(hdspm, HDSPM_inputEnableBase + (4 * i), v);
1200 static inline void snd_hdspm_enable_out(struct hdspm * hdspm, int i, int v)
1202 hdspm_write(hdspm, HDSPM_outputEnableBase + (4 * i), v);
1206 static int snd_hdspm_use_is_exclusive(struct hdspm *hdspm)
1211 spin_lock_irqsave(&hdspm->lock, flags);
1212 if ((hdspm->playback_pid != hdspm->capture_pid) &&
1213 (hdspm->playback_pid >= 0) && (hdspm->capture_pid >= 0)) {
1216 spin_unlock_irqrestore(&hdspm->lock, flags);
1239 static int hdspm_rate_multiplier(struct hdspm *hdspm, int rate)
1242 if (hdspm->control_register & HDSPM_QuadSpeed)
1244 else if (hdspm->control_register &
1252 static int hdspm_external_sample_rate(struct hdspm *hdspm)
1257 switch (hdspm->io_type) {
1259 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
1260 status = hdspm_read(hdspm, HDSPM_statusRegister);
1262 syncref = hdspm_autosync_ref(hdspm);
1266 if (hdspm_wc_sync_check(hdspm))
1267 return HDSPM_bit2freq(hdspm_get_wc_sample_rate(hdspm));
1279 if (hdspm_aes_sync_check(hdspm, syncref - HDSPM_AES32_AUTOSYNC_FROM_AES1))
1280 return HDSPM_bit2freq(hdspm_get_aes_sample_rate(hdspm,
1287 if (hdspm_tco_sync_check(hdspm))
1288 return HDSPM_bit2freq(hdspm_get_tco_sample_rate(hdspm));
1296 status = hdspm_read(hdspm, HDSPM_statusRegister);
1330 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
1331 status = hdspm_read(hdspm, HDSPM_statusRegister);
1380 return hdspm_rate_multiplier(hdspm, rate);
1426 syncref = hdspm_autosync_ref(hdspm);
1430 hdspm_tco_sync_check(hdspm));
1434 hdspm_sync_in_sync_check(hdspm));
1439 hdspm_get_pll_freq(hdspm));
1443 rate = hdspm_rate_multiplier(hdspm, rate);
1452 static int hdspm_get_latency(struct hdspm *hdspm)
1456 n = hdspm_decode_latency(hdspm->control_register);
1465 if ((7 == n) && (RayDAT == hdspm->io_type || AIO == hdspm->io_type))
1472 static inline void hdspm_compute_period_size(struct hdspm *hdspm)
1474 hdspm->period_bytes = 4 * hdspm_get_latency(hdspm);
1478 static snd_pcm_uframes_t hdspm_hw_pointer(struct hdspm *hdspm)
1482 position = hdspm_read(hdspm, HDSPM_statusRegister);
1484 switch (hdspm->io_type) {
1492 (hdspm->period_bytes / 4) : 0;
1499 static inline void hdspm_start_audio(struct hdspm * s)
1505 static inline void hdspm_stop_audio(struct hdspm * s)
1512 static void hdspm_silence_playback(struct hdspm *hdspm)
1515 int n = hdspm->period_bytes;
1516 void *buf = hdspm->playback_buffer;
1527 static int hdspm_set_interrupt_interval(struct hdspm *s, unsigned int frames)
1566 static u64 hdspm_calc_dds_value(struct hdspm *hdspm, u64 period)
1573 switch (hdspm->io_type) {
1594 static void hdspm_set_dds_value(struct hdspm *hdspm, int rate)
1606 switch (hdspm->io_type) {
1626 hdspm_write(hdspm, HDSPM_freqReg, (u32)n);
1630 static int hdspm_set_rate(struct hdspm * hdspm, int rate, int called_internally)
1637 /* ASSUMPTION: hdspm->lock is either set, or there is no need for
1641 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
1650 dev_warn(hdspm->card->dev,
1657 hdspm_external_sample_rate(hdspm);
1659 if (hdspm_autosync_ref(hdspm) ==
1662 dev_warn(hdspm->card->dev,
1668 dev_warn(hdspm->card->dev,
1675 current_rate = hdspm->system_sample_rate;
1734 && (hdspm->capture_pid >= 0 || hdspm->playback_pid >= 0)) {
1735 dev_err(hdspm->card->dev,
1739 hdspm->capture_pid, hdspm->playback_pid);
1743 hdspm->control_register &= ~HDSPM_FrequencyMask;
1744 hdspm->control_register |= rate_bits;
1745 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1749 hdspm_set_dds_value(hdspm, rate);
1751 if (AES32 == hdspm->io_type && rate != current_rate)
1752 hdspm_write(hdspm, HDSPM_eeprom_wr, 0);
1754 hdspm->system_sample_rate = rate;
1757 hdspm->channel_map_in = hdspm->channel_map_in_ss;
1758 hdspm->channel_map_out = hdspm->channel_map_out_ss;
1759 hdspm->max_channels_in = hdspm->ss_in_channels;
1760 hdspm->max_channels_out = hdspm->ss_out_channels;
1761 hdspm->port_names_in = hdspm->port_names_in_ss;
1762 hdspm->port_names_out = hdspm->port_names_out_ss;
1764 hdspm->channel_map_in = hdspm->channel_map_in_ds;
1765 hdspm->channel_map_out = hdspm->channel_map_out_ds;
1766 hdspm->max_channels_in = hdspm->ds_in_channels;
1767 hdspm->max_channels_out = hdspm->ds_out_channels;
1768 hdspm->port_names_in = hdspm->port_names_in_ds;
1769 hdspm->port_names_out = hdspm->port_names_out_ds;
1771 hdspm->channel_map_in = hdspm->channel_map_in_qs;
1772 hdspm->channel_map_out = hdspm->channel_map_out_qs;
1773 hdspm->max_channels_in = hdspm->qs_in_channels;
1774 hdspm->max_channels_out = hdspm->qs_out_channels;
1775 hdspm->port_names_in = hdspm->port_names_in_qs;
1776 hdspm->port_names_out = hdspm->port_names_out_qs;
1786 static void all_in_all_mixer(struct hdspm * hdspm, int sgain)
1800 hdspm_write_in_gain(hdspm, i, j, gain);
1801 hdspm_write_pb_gain(hdspm, i, j, gain);
1809 static inline unsigned char snd_hdspm_midi_read_byte (struct hdspm *hdspm,
1813 return hdspm_read(hdspm, hdspm->midi[id].dataIn);
1816 static inline void snd_hdspm_midi_write_byte (struct hdspm *hdspm, int id,
1820 return hdspm_write(hdspm, hdspm->midi[id].dataOut, val);
1823 static inline int snd_hdspm_midi_input_available (struct hdspm *hdspm, int id)
1825 return hdspm_read(hdspm, hdspm->midi[id].statusIn) & 0xFF;
1828 static inline int snd_hdspm_midi_output_possible (struct hdspm *hdspm, int id)
1832 fifo_bytes_used = hdspm_read(hdspm, hdspm->midi[id].statusOut) & 0xFF;
1840 static void snd_hdspm_flush_midi_input(struct hdspm *hdspm, int id)
1842 while (snd_hdspm_midi_input_available (hdspm, id))
1843 snd_hdspm_midi_read_byte (hdspm, id);
1859 n_pending = snd_hdspm_midi_output_possible (hmidi->hdspm,
1869 snd_hdspm_midi_write_byte (hmidi->hdspm,
1889 n_pending = snd_hdspm_midi_input_available (hmidi->hdspm, hmidi->id);
1895 buf[i] = snd_hdspm_midi_read_byte (hmidi->hdspm,
1903 snd_hdspm_midi_read_byte (hmidi->hdspm,
1910 spin_lock_irqsave(&hmidi->hdspm->lock, flags);
1911 hmidi->hdspm->control_register |= hmidi->ie;
1912 hdspm_write(hmidi->hdspm, HDSPM_controlRegister,
1913 hmidi->hdspm->control_register);
1914 spin_unlock_irqrestore(&hmidi->hdspm->lock, flags);
1922 struct hdspm *hdspm;
1927 hdspm = hmidi->hdspm;
1929 spin_lock_irqsave (&hdspm->lock, flags);
1931 if (!(hdspm->control_register & hmidi->ie)) {
1932 snd_hdspm_flush_midi_input (hdspm, hmidi->id);
1933 hdspm->control_register |= hmidi->ie;
1936 hdspm->control_register &= ~hmidi->ie;
1939 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1940 spin_unlock_irqrestore (&hdspm->lock, flags);
1993 snd_hdspm_flush_midi_input (hmidi->hdspm, hmidi->id);
2055 struct hdspm *hdspm, int id)
2060 hdspm->midi[id].id = id;
2061 hdspm->midi[id].hdspm = hdspm;
2062 spin_lock_init (&hdspm->midi[id].lock);
2065 if (MADIface == hdspm->io_type) {
2067 hdspm->midi[0].dataIn = HDSPM_midiDataIn2;
2068 hdspm->midi[0].statusIn = HDSPM_midiStatusIn2;
2069 hdspm->midi[0].dataOut = HDSPM_midiDataOut2;
2070 hdspm->midi[0].statusOut = HDSPM_midiStatusOut2;
2071 hdspm->midi[0].ie = HDSPM_Midi2InterruptEnable;
2072 hdspm->midi[0].irq = HDSPM_midi2IRQPending;
2074 hdspm->midi[0].dataIn = HDSPM_midiDataIn0;
2075 hdspm->midi[0].statusIn = HDSPM_midiStatusIn0;
2076 hdspm->midi[0].dataOut = HDSPM_midiDataOut0;
2077 hdspm->midi[0].statusOut = HDSPM_midiStatusOut0;
2078 hdspm->midi[0].ie = HDSPM_Midi0InterruptEnable;
2079 hdspm->midi[0].irq = HDSPM_midi0IRQPending;
2082 hdspm->midi[1].dataIn = HDSPM_midiDataIn1;
2083 hdspm->midi[1].statusIn = HDSPM_midiStatusIn1;
2084 hdspm->midi[1].dataOut = HDSPM_midiDataOut1;
2085 hdspm->midi[1].statusOut = HDSPM_midiStatusOut1;
2086 hdspm->midi[1].ie = HDSPM_Midi1InterruptEnable;
2087 hdspm->midi[1].irq = HDSPM_midi1IRQPending;
2088 } else if ((2 == id) && (MADI == hdspm->io_type)) {
2090 hdspm->midi[2].dataIn = HDSPM_midiDataIn2;
2091 hdspm->midi[2].statusIn = HDSPM_midiStatusIn2;
2092 hdspm->midi[2].dataOut = HDSPM_midiDataOut2;
2093 hdspm->midi[2].statusOut = HDSPM_midiStatusOut2;
2094 hdspm->midi[2].ie = HDSPM_Midi2InterruptEnable;
2095 hdspm->midi[2].irq = HDSPM_midi2IRQPending;
2098 hdspm->midi[2].dataIn = HDSPM_midiDataIn2;
2099 hdspm->midi[2].statusIn = HDSPM_midiStatusIn2;
2100 hdspm->midi[2].dataOut = -1;
2101 hdspm->midi[2].statusOut = -1;
2102 hdspm->midi[2].ie = HDSPM_Midi2InterruptEnable;
2103 hdspm->midi[2].irq = HDSPM_midi2IRQPendingAES;
2106 hdspm->midi[3].dataIn = HDSPM_midiDataIn3;
2107 hdspm->midi[3].statusIn = HDSPM_midiStatusIn3;
2108 hdspm->midi[3].dataOut = -1;
2109 hdspm->midi[3].statusOut = -1;
2110 hdspm->midi[3].ie = HDSPM_Midi3InterruptEnable;
2111 hdspm->midi[3].irq = HDSPM_midi3IRQPending;
2114 if ((id < 2) || ((2 == id) && ((MADI == hdspm->io_type) ||
2115 (MADIface == hdspm->io_type)))) {
2116 if ((id == 0) && (MADIface == hdspm->io_type)) {
2119 } else if ((id == 2) && (MADI == hdspm->io_type)) {
2127 &hdspm->midi[id].rmidi);
2131 snprintf(hdspm->midi[id].rmidi->name,
2132 sizeof(hdspm->midi[id].rmidi->name),
2134 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
2136 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
2139 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
2143 hdspm->midi[id].rmidi->info_flags |=
2152 &hdspm->midi[id].rmidi);
2156 snprintf(hdspm->midi[id].rmidi->name,
2157 sizeof(hdspm->midi[id].rmidi->name),
2159 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
2161 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
2165 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_INPUT;
2174 struct hdspm *hdspm = container_of(work, struct hdspm, midi_work);
2177 while (i < hdspm->midiPorts) {
2178 if (hdspm->midi[i].pending)
2179 snd_hdspm_midi_input_read(&hdspm->midi[i]);
2193 static inline int hdspm_get_pll_freq(struct hdspm *hdspm)
2197 period = hdspm_read(hdspm, HDSPM_RD_PLL_FREQ);
2198 rate = hdspm_calc_dds_value(hdspm, period);
2207 static int hdspm_get_system_sample_rate(struct hdspm *hdspm)
2211 rate = hdspm_get_pll_freq(hdspm);
2215 if (0 == hdspm_system_clock_mode(hdspm)) {
2217 rate = hdspm->system_sample_rate;
2220 rate = hdspm_external_sample_rate(hdspm);
2222 rate = hdspm->system_sample_rate;
2257 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2259 ucontrol->value.integer.value[0] = hdspm_get_system_sample_rate(hdspm);
2267 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2272 hdspm_set_dds_value(hdspm, ucontrol->value.integer.value[0]);
2280 static int hdspm_get_wc_sample_rate(struct hdspm *hdspm)
2284 switch (hdspm->io_type) {
2287 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
2291 status = hdspm_read(hdspm, HDSPM_statusRegister);
2305 static int hdspm_get_tco_sample_rate(struct hdspm *hdspm)
2309 if (hdspm->tco) {
2310 switch (hdspm->io_type) {
2313 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
2317 status = hdspm_read(hdspm, HDSPM_statusRegister);
2331 static int hdspm_get_sync_in_sample_rate(struct hdspm *hdspm)
2335 if (hdspm->tco) {
2336 switch (hdspm->io_type) {
2339 status = hdspm_read(hdspm, HDSPM_RD_STATUS_2);
2353 static int hdspm_get_aes_sample_rate(struct hdspm *hdspm, int index)
2357 switch (hdspm->io_type) {
2359 timecode = hdspm_read(hdspm, HDSPM_timecodeRegister);
2372 static int hdspm_get_s1_sample_rate(struct hdspm *hdspm, unsigned int idx)
2374 int status = hdspm_read(hdspm, HDSPM_RD_STATUS_2);
2386 static int hdspm_external_rate_to_enum(struct hdspm *hdspm)
2388 int rate = hdspm_external_sample_rate(hdspm);
2421 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2423 switch (hdspm->io_type) {
2428 hdspm_get_wc_sample_rate(hdspm);
2432 hdspm_get_tco_sample_rate(hdspm);
2436 hdspm_get_sync_in_sample_rate(hdspm);
2440 hdspm_get_s1_sample_rate(hdspm,
2449 hdspm_get_wc_sample_rate(hdspm);
2453 hdspm_get_tco_sample_rate(hdspm);
2457 hdspm_get_sync_in_sample_rate(hdspm);
2461 hdspm_get_s1_sample_rate(hdspm,
2471 hdspm_get_wc_sample_rate(hdspm);
2475 hdspm_get_tco_sample_rate(hdspm);
2479 hdspm_get_sync_in_sample_rate(hdspm);
2483 hdspm_external_rate_to_enum(hdspm);
2487 hdspm_get_aes_sample_rate(hdspm,
2497 hdspm_external_rate_to_enum(hdspm);
2523 static int hdspm_system_clock_mode(struct hdspm *hdspm)
2525 switch (hdspm->io_type) {
2528 if (hdspm->settings_register & HDSPM_c0Master)
2533 if (hdspm->control_register & HDSPM_ClockModeMaster)
2545 static void hdspm_set_system_clock_mode(struct hdspm *hdspm, int mode)
2547 hdspm_set_toggle_setting(hdspm,
2548 (hdspm_is_raydat_or_aio(hdspm)) ?
2565 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2567 ucontrol->value.enumerated.item[0] = hdspm_system_clock_mode(hdspm);
2574 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2577 if (!snd_hdspm_use_is_exclusive(hdspm))
2586 hdspm_set_system_clock_mode(hdspm, val);
2602 static int hdspm_clock_source(struct hdspm * hdspm)
2604 switch (hdspm->system_sample_rate) {
2619 static int hdspm_set_clock_source(struct hdspm * hdspm, int mode)
2644 hdspm_set_rate(hdspm, rate, 1);
2657 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2659 ucontrol->value.enumerated.item[0] = hdspm_clock_source(hdspm);
2666 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2670 if (!snd_hdspm_use_is_exclusive(hdspm))
2677 spin_lock_irq(&hdspm->lock);
2678 if (val != hdspm_clock_source(hdspm))
2679 change = (hdspm_set_clock_source(hdspm, val) == 0) ? 1 : 0;
2682 spin_unlock_irq(&hdspm->lock);
2704 static int hdspm_pref_sync_ref(struct hdspm * hdspm)
2706 switch (hdspm->io_type) {
2708 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2725 if (hdspm->tco) {
2726 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2734 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2744 if (hdspm->tco) {
2745 switch ((hdspm->settings_register &
2758 switch ((hdspm->settings_register &
2774 if (hdspm->tco) {
2775 switch ((hdspm->settings_register &
2785 switch ((hdspm->settings_register &
2807 static int hdspm_set_pref_sync_ref(struct hdspm * hdspm, int pref)
2811 switch (hdspm->io_type) {
2813 hdspm->control_register &= ~HDSPM_SyncRefMask;
2818 hdspm->control_register |= HDSPM_SyncRef0;
2821 hdspm->control_register |= HDSPM_SyncRef1;
2824 hdspm->control_register |=
2828 hdspm->control_register |= HDSPM_SyncRef2;
2831 hdspm->control_register |=
2835 hdspm->control_register |=
2839 hdspm->control_register |=
2843 hdspm->control_register |= HDSPM_SyncRef3;
2846 hdspm->control_register |=
2857 hdspm->control_register &= ~HDSPM_SyncRefMask;
2858 if (hdspm->tco) {
2863 hdspm->control_register |= HDSPM_SyncRef0;
2866 hdspm->control_register |= HDSPM_SyncRef1;
2869 hdspm->control_register |=
2880 hdspm->control_register |= HDSPM_SyncRef0;
2883 hdspm->control_register |=
2894 if (hdspm->tco) {
2923 if (hdspm->tco) {
2946 switch (hdspm->io_type) {
2949 hdspm->settings_register &= ~HDSPM_c0_SyncRefMask;
2950 hdspm->settings_register |= HDSPM_c0_SyncRef0 * p;
2951 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
2957 hdspm_write(hdspm, HDSPM_controlRegister,
2958 hdspm->control_register);
2968 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2970 snd_ctl_enum_info(uinfo, 1, hdspm->texts_autosync_items, hdspm->texts_autosync);
2978 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2979 int psf = hdspm_pref_sync_ref(hdspm);
2992 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2995 if (!snd_hdspm_use_is_exclusive(hdspm))
3002 else if (val >= hdspm->texts_autosync_items)
3003 val = hdspm->texts_autosync_items-1;
3005 spin_lock_irq(&hdspm->lock);
3006 if (val != hdspm_pref_sync_ref(hdspm))
3007 change = (0 == hdspm_set_pref_sync_ref(hdspm, val)) ? 1 : 0;
3009 spin_unlock_irq(&hdspm->lock);
3023 static int hdspm_autosync_ref(struct hdspm *hdspm)
3026 if (AES32 == hdspm->io_type) {
3028 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister);
3036 } else if (MADI == hdspm->io_type) {
3038 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
3062 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3064 if (AES32 == hdspm->io_type) {
3069 } else if (MADI == hdspm->io_type) {
3081 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3083 ucontrol->value.enumerated.item[0] = hdspm_autosync_ref(hdspm);
3112 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3113 status = hdspm_read(hdspm, HDSPM_RD_TCO + 4);
3153 static int hdspm_tco_ltc_frames(struct hdspm *hdspm)
3158 status = hdspm_read(hdspm, HDSPM_RD_TCO + 4);
3187 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3189 ucontrol->value.enumerated.item[0] = hdspm_tco_ltc_frames(hdspm);
3202 static int hdspm_toggle_setting(struct hdspm *hdspm, u32 regmask)
3206 if (hdspm_is_raydat_or_aio(hdspm))
3207 reg = hdspm->settings_register;
3209 reg = hdspm->control_register;
3214 static int hdspm_set_toggle_setting(struct hdspm *hdspm, u32 regmask, int out)
3219 if (hdspm_is_raydat_or_aio(hdspm)) {
3220 reg = &(hdspm->settings_register);
3223 reg = &(hdspm->control_register);
3232 hdspm_write(hdspm, target_reg, *reg);
3242 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3245 spin_lock_irq(&hdspm->lock);
3246 ucontrol->value.integer.value[0] = hdspm_toggle_setting(hdspm, regmask);
3247 spin_unlock_irq(&hdspm->lock);
3254 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3259 if (!snd_hdspm_use_is_exclusive(hdspm))
3262 spin_lock_irq(&hdspm->lock);
3263 change = (int) val != hdspm_toggle_setting(hdspm, regmask);
3264 hdspm_set_toggle_setting(hdspm, regmask, val);
3265 spin_unlock_irq(&hdspm->lock);
3278 static int hdspm_input_select(struct hdspm * hdspm)
3280 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0;
3283 static int hdspm_set_input_select(struct hdspm * hdspm, int out)
3286 hdspm->control_register |= HDSPM_InputSelect0;
3288 hdspm->control_register &= ~HDSPM_InputSelect0;
3289 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3305 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3307 spin_lock_irq(&hdspm->lock);
3308 ucontrol->value.enumerated.item[0] = hdspm_input_select(hdspm);
3309 spin_unlock_irq(&hdspm->lock);
3316 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3320 if (!snd_hdspm_use_is_exclusive(hdspm))
3323 spin_lock_irq(&hdspm->lock);
3324 change = (int) val != hdspm_input_select(hdspm);
3325 hdspm_set_input_select(hdspm, val);
3326 spin_unlock_irq(&hdspm->lock);
3340 static int hdspm_ds_wire(struct hdspm * hdspm)
3342 return (hdspm->control_register & HDSPM_DS_DoubleWire) ? 1 : 0;
3345 static int hdspm_set_ds_wire(struct hdspm * hdspm, int ds)
3348 hdspm->control_register |= HDSPM_DS_DoubleWire;
3350 hdspm->control_register &= ~HDSPM_DS_DoubleWire;
3351 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3367 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3369 spin_lock_irq(&hdspm->lock);
3370 ucontrol->value.enumerated.item[0] = hdspm_ds_wire(hdspm);
3371 spin_unlock_irq(&hdspm->lock);
3378 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3382 if (!snd_hdspm_use_is_exclusive(hdspm))
3385 spin_lock_irq(&hdspm->lock);
3386 change = (int) val != hdspm_ds_wire(hdspm);
3387 hdspm_set_ds_wire(hdspm, val);
3388 spin_unlock_irq(&hdspm->lock);
3402 static int hdspm_qs_wire(struct hdspm * hdspm)
3404 if (hdspm->control_register & HDSPM_QS_DoubleWire)
3406 if (hdspm->control_register & HDSPM_QS_QuadWire)
3411 static int hdspm_set_qs_wire(struct hdspm * hdspm, int mode)
3413 hdspm->control_register &= ~(HDSPM_QS_DoubleWire | HDSPM_QS_QuadWire);
3418 hdspm->control_register |= HDSPM_QS_DoubleWire;
3421 hdspm->control_register |= HDSPM_QS_QuadWire;
3424 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3440 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3442 spin_lock_irq(&hdspm->lock);
3443 ucontrol->value.enumerated.item[0] = hdspm_qs_wire(hdspm);
3444 spin_unlock_irq(&hdspm->lock);
3451 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3455 if (!snd_hdspm_use_is_exclusive(hdspm))
3462 spin_lock_irq(&hdspm->lock);
3463 change = val != hdspm_qs_wire(hdspm);
3464 hdspm_set_qs_wire(hdspm, val);
3465 spin_unlock_irq(&hdspm->lock);
3478 static int hdspm_tristate(struct hdspm *hdspm, u32 regmask)
3480 u32 reg = hdspm->settings_register & (regmask * 3);
3484 static int hdspm_set_tristate(struct hdspm *hdspm, int mode, u32 regmask)
3486 hdspm->settings_register &= ~(regmask * 3);
3487 hdspm->settings_register |= (regmask * mode);
3488 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
3515 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3518 spin_lock_irq(&hdspm->lock);
3519 ucontrol->value.enumerated.item[0] = hdspm_tristate(hdspm, regmask);
3520 spin_unlock_irq(&hdspm->lock);
3527 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3532 if (!snd_hdspm_use_is_exclusive(hdspm))
3540 spin_lock_irq(&hdspm->lock);
3541 change = val != hdspm_tristate(hdspm, regmask);
3542 hdspm_set_tristate(hdspm, val, regmask);
3543 spin_unlock_irq(&hdspm->lock);
3556 static int hdspm_madi_speedmode(struct hdspm *hdspm)
3558 if (hdspm->control_register & HDSPM_QuadSpeed)
3560 if (hdspm->control_register & HDSPM_DoubleSpeed)
3565 static int hdspm_set_madi_speedmode(struct hdspm *hdspm, int mode)
3567 hdspm->control_register &= ~(HDSPM_DoubleSpeed | HDSPM_QuadSpeed);
3572 hdspm->control_register |= HDSPM_DoubleSpeed;
3575 hdspm->control_register |= HDSPM_QuadSpeed;
3578 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3594 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3596 spin_lock_irq(&hdspm->lock);
3597 ucontrol->value.enumerated.item[0] = hdspm_madi_speedmode(hdspm);
3598 spin_unlock_irq(&hdspm->lock);
3605 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3609 if (!snd_hdspm_use_is_exclusive(hdspm))
3616 spin_lock_irq(&hdspm->lock);
3617 change = val != hdspm_madi_speedmode(hdspm);
3618 hdspm_set_madi_speedmode(hdspm, val);
3619 spin_unlock_irq(&hdspm->lock);
3649 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3665 spin_lock_irq(&hdspm->lock);
3668 hdspm_read_pb_gain(hdspm, destination,
3672 hdspm_read_in_gain(hdspm, destination, source);
3674 spin_unlock_irq(&hdspm->lock);
3682 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3688 if (!snd_hdspm_use_is_exclusive(hdspm))
3701 spin_lock_irq(&hdspm->lock);
3704 change = gain != hdspm_read_pb_gain(hdspm, destination,
3708 change = gain != hdspm_read_in_gain(hdspm, destination,
3713 hdspm_write_pb_gain(hdspm, destination,
3717 hdspm_write_in_gain(hdspm, destination, source,
3720 spin_unlock_irq(&hdspm->lock);
3753 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3761 spin_lock_irq(&hdspm->lock);
3763 (hdspm_read_pb_gain(hdspm, channel, channel)*64)/UNITY_GAIN;
3764 spin_unlock_irq(&hdspm->lock);
3772 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3777 if (!snd_hdspm_use_is_exclusive(hdspm))
3787 spin_lock_irq(&hdspm->lock);
3789 gain != hdspm_read_pb_gain(hdspm, channel,
3792 hdspm_write_pb_gain(hdspm, channel, channel,
3794 spin_unlock_irq(&hdspm->lock);
3834 static int hdspm_wc_sync_check(struct hdspm *hdspm)
3838 switch (hdspm->io_type) {
3840 status = hdspm_read(hdspm, HDSPM_statusRegister);
3851 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
3863 status = hdspm_read(hdspm, HDSPM_statusRegister);
3882 static int hdspm_madi_sync_check(struct hdspm *hdspm)
3884 int status = hdspm_read(hdspm, HDSPM_statusRegister);
3895 static int hdspm_s1_sync_check(struct hdspm *hdspm, int idx)
3899 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
3912 static int hdspm_sync_in_sync_check(struct hdspm *hdspm)
3916 switch (hdspm->io_type) {
3919 status = hdspm_read(hdspm, HDSPM_RD_STATUS_3);
3925 status = hdspm_read(hdspm, HDSPM_statusRegister);
3931 status = hdspm_read(hdspm, HDSPM_statusRegister2);
3948 static int hdspm_aes_sync_check(struct hdspm *hdspm, int idx)
3951 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
3963 static int hdspm_tco_input_check(struct hdspm *hdspm, u32 mask)
3966 status = hdspm_read(hdspm, HDSPM_RD_TCO + 4);
3972 static int hdspm_tco_sync_check(struct hdspm *hdspm)
3976 if (hdspm->tco) {
3977 switch (hdspm->io_type) {
3979 status = hdspm_read(hdspm, HDSPM_statusRegister);
3988 status = hdspm_read(hdspm, HDSPM_statusRegister);
3998 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
4018 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4021 switch (hdspm->io_type) {
4025 val = hdspm_wc_sync_check(hdspm); break;
4027 val = hdspm_tco_sync_check(hdspm); break;
4029 val = hdspm_sync_in_sync_check(hdspm); break;
4031 val = hdspm_s1_sync_check(hdspm,
4039 val = hdspm_wc_sync_check(hdspm); break;
4041 val = hdspm_tco_sync_check(hdspm); break;
4043 val = hdspm_sync_in_sync_check(hdspm); break;
4045 val = hdspm_s1_sync_check(hdspm,
4053 val = hdspm_wc_sync_check(hdspm); break;
4055 val = hdspm_madi_sync_check(hdspm); break;
4057 val = hdspm_tco_sync_check(hdspm); break;
4059 val = hdspm_sync_in_sync_check(hdspm); break;
4064 val = hdspm_madi_sync_check(hdspm); /* MADI */
4070 val = hdspm_wc_sync_check(hdspm); break;
4072 val = hdspm_tco_sync_check(hdspm); break;
4074 val = hdspm_sync_in_sync_check(hdspm); break;
4076 val = hdspm_aes_sync_check(hdspm,
4083 if (hdspm->tco) {
4087 val = hdspm_tco_input_check(hdspm, HDSPM_TCO1_TCO_lock);
4091 val = hdspm_tco_input_check(hdspm,
4111 static void hdspm_tco_write(struct hdspm *hdspm)
4115 switch (hdspm->tco->input) {
4126 switch (hdspm->tco->framerate) {
4150 switch (hdspm->tco->wordclock) {
4161 switch (hdspm->tco->samplerate) {
4172 switch (hdspm->tco->pull) {
4189 if (1 == hdspm->tco->term) {
4193 hdspm_write(hdspm, HDSPM_WR_TCO, tc[0]);
4194 hdspm_write(hdspm, HDSPM_WR_TCO+4, tc[1]);
4195 hdspm_write(hdspm, HDSPM_WR_TCO+8, tc[2]);
4196 hdspm_write(hdspm, HDSPM_WR_TCO+12, tc[3]);
4223 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4225 ucontrol->value.enumerated.item[0] = hdspm->tco->samplerate;
4233 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4235 if (hdspm->tco->samplerate != ucontrol->value.enumerated.item[0]) {
4236 hdspm->tco->samplerate = ucontrol->value.enumerated.item[0];
4238 hdspm_tco_write(hdspm);
4270 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4272 ucontrol->value.enumerated.item[0] = hdspm->tco->pull;
4280 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4282 if (hdspm->tco->pull != ucontrol->value.enumerated.item[0]) {
4283 hdspm->tco->pull = ucontrol->value.enumerated.item[0];
4285 hdspm_tco_write(hdspm);
4315 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4317 ucontrol->value.enumerated.item[0] = hdspm->tco->wordclock;
4325 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4327 if (hdspm->tco->wordclock != ucontrol->value.enumerated.item[0]) {
4328 hdspm->tco->wordclock = ucontrol->value.enumerated.item[0];
4330 hdspm_tco_write(hdspm);
4362 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4364 ucontrol->value.enumerated.item[0] = hdspm->tco->framerate;
4372 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4374 if (hdspm->tco->framerate != ucontrol->value.enumerated.item[0]) {
4375 hdspm->tco->framerate = ucontrol->value.enumerated.item[0];
4377 hdspm_tco_write(hdspm);
4408 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4410 ucontrol->value.enumerated.item[0] = hdspm->tco->input;
4418 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4420 if (hdspm->tco->input != ucontrol->value.enumerated.item[0]) {
4421 hdspm->tco->input = ucontrol->value.enumerated.item[0];
4423 hdspm_tco_write(hdspm);
4458 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4460 ucontrol->value.integer.value[0] = hdspm->tco->term;
4469 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4471 if (hdspm->tco->term != ucontrol->value.integer.value[0]) {
4472 hdspm->tco->term = ucontrol->value.integer.value[0];
4474 hdspm_tco_write(hdspm);
4648 static int hdspm_update_simple_mixer_controls(struct hdspm * hdspm)
4652 for (i = hdspm->ds_out_channels; i < hdspm->ss_out_channels; ++i) {
4653 if (hdspm->system_sample_rate > 48000) {
4654 hdspm->playback_mixer_ctls[i]->vd[0].access =
4659 hdspm->playback_mixer_ctls[i]->vd[0].access =
4663 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE |
4665 &hdspm->playback_mixer_ctls[i]->id);
4673 struct hdspm *hdspm)
4680 switch (hdspm->io_type) {
4706 snd_ctl_new1(&list[idx], hdspm));
4715 if (hdspm->system_sample_rate >= 128000) {
4716 limit = hdspm->qs_out_channels;
4717 } else if (hdspm->system_sample_rate >= 64000) {
4718 limit = hdspm->ds_out_channels;
4720 limit = hdspm->ss_out_channels;
4724 kctl = snd_ctl_new1(&snd_hdspm_playback_mixer, hdspm);
4728 hdspm->playback_mixer_ctls[idx] = kctl;
4732 if (hdspm->tco) {
4738 snd_ctl_new1(&list[idx], hdspm));
4755 struct hdspm *hdspm = entry->private_data;
4764 status = hdspm_read(hdspm, HDSPM_statusRegister);
4765 control = hdspm->control_register;
4770 a = hdspm_read(hdspm, HDSPM_RD_TCO+4);
4809 switch (hdspm->io_type) {
4822 period = hdspm_read(hdspm, HDSPM_RD_PLL_FREQ);
4838 ltc = hdspm_read(hdspm, HDSPM_RD_TCO);
4867 struct hdspm *hdspm = entry->private_data;
4875 status = hdspm_read(hdspm, HDSPM_statusRegister);
4876 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
4879 hdspm->card_name, hdspm->card->number + 1,
4880 hdspm->firmware_rev,
4886 (hdspm_read(hdspm, HDSPM_midiStatusIn1)>>8) & 0xFFFFFF,
4887 hdspm->serial);
4890 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase);
4899 hdspm->irq_count);
4906 (2 * (int)hdspm->period_bytes),
4908 (2 * (int)hdspm->period_bytes),
4909 (long) hdspm_hw_pointer(hdspm) * 4);
4913 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF,
4914 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF,
4915 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF,
4916 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF);
4919 hdspm_read(hdspm, HDSPM_midiStatusIn2) & 0xFF,
4920 hdspm_read(hdspm, HDSPM_midiStatusOut2) & 0xFF);
4924 hdspm->control_register, hdspm->control2_register,
4930 x = hdspm_get_latency(hdspm);
4934 x, (unsigned long) hdspm->period_bytes);
4937 (hdspm->control_register & HDSPM_LineOut) ? "on " : "off");
4942 (hdspm->control_register & HDSPM_clr_tms) ? "on" : "off",
4943 (hdspm->control_register & HDSPM_TX_64ch) ? "64" : "56",
4944 (hdspm->control_register & HDSPM_AutoInp) ? "on" : "off");
4947 if (!(hdspm->control_register & HDSPM_ClockModeMaster))
4953 switch (hdspm_pref_sync_ref(hdspm)) {
4974 hdspm->system_sample_rate);
4988 switch (hdspm_autosync_ref(hdspm)) {
5010 autosync_ref, hdspm_external_sample_rate(hdspm),
5029 struct hdspm *hdspm = entry->private_data;
5038 status = hdspm_read(hdspm, HDSPM_statusRegister);
5039 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
5040 timecode = hdspm_read(hdspm, HDSPM_timecodeRegister);
5043 hdspm->card_name, hdspm->card->number + 1,
5044 hdspm->firmware_rev);
5047 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase);
5056 hdspm->irq_count);
5063 (2 * (int)hdspm->period_bytes),
5065 (2 * (int)hdspm->period_bytes),
5066 (long) hdspm_hw_pointer(hdspm) * 4);
5070 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF,
5071 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF,
5072 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF,
5073 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF);
5076 hdspm_read(hdspm, HDSPM_midiStatusIn2) & 0xFF,
5077 hdspm_read(hdspm, HDSPM_midiStatusOut2) & 0xFF);
5081 hdspm->control_register, hdspm->control2_register,
5086 x = hdspm_get_latency(hdspm);
5090 x, (unsigned long) hdspm->period_bytes);
5093 (hdspm->
5098 (hdspm->
5100 (hdspm->
5102 (hdspm->
5106 pref_syncref = hdspm_pref_sync_ref(hdspm);
5114 hdspm->system_sample_rate);
5117 hdspm->control_register & HDSPM_DS_DoubleWire?
5120 hdspm->control_register & HDSPM_QS_DoubleWire?
5122 hdspm->control_register & HDSPM_QS_QuadWire?
5142 switch (hdspm_autosync_ref(hdspm)) {
5182 struct hdspm *hdspm = entry->private_data;
5186 status1 = hdspm_read(hdspm, HDSPM_RD_STATUS_1); /* s1 */
5187 status2 = hdspm_read(hdspm, HDSPM_RD_STATUS_2); /* freq */
5188 status3 = hdspm_read(hdspm, HDSPM_RD_STATUS_3); /* s2 */
5198 (hdspm_system_clock_mode(hdspm) == 0) ? "master" : "slave");
5200 hdspm_get_system_sample_rate(hdspm));
5240 struct hdspm *hdspm = entry->private_data;
5247 snd_iprintf(buffer, "%08X ", hdspm_read(hdspm, i + j));
5257 struct hdspm *hdspm = entry->private_data;
5260 snd_iprintf(buffer, "# generated by hdspm\n");
5262 for (i = 0; i < hdspm->max_channels_in; i++) {
5263 snd_iprintf(buffer, "%d=%s\n", i+1, hdspm->port_names_in[i]);
5270 struct hdspm *hdspm = entry->private_data;
5273 snd_iprintf(buffer, "# generated by hdspm\n");
5275 for (i = 0; i < hdspm->max_channels_out; i++) {
5276 snd_iprintf(buffer, "%d=%s\n", i+1, hdspm->port_names_out[i]);
5281 static void snd_hdspm_proc_init(struct hdspm *hdspm)
5285 switch (hdspm->io_type) {
5302 snd_card_ro_proc_new(hdspm->card, "hdspm", hdspm, read);
5303 snd_card_ro_proc_new(hdspm->card, "ports.in", hdspm,
5305 snd_card_ro_proc_new(hdspm->card, "ports.out", hdspm,
5309 /* debug file to read all hdspm registers */
5310 snd_card_ro_proc_new(hdspm->card, "debug", hdspm,
5316 hdspm intitialize
5319 static int snd_hdspm_set_defaults(struct hdspm * hdspm)
5321 /* ASSUMPTION: hdspm->lock is either held, or there is no need to
5327 hdspm->settings_register = 0;
5329 switch (hdspm->io_type) {
5332 hdspm->control_register =
5338 hdspm->settings_register = 0x1 + 0x1000;
5341 hdspm->control_register =
5346 hdspm->control_register =
5355 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
5357 if (AES32 == hdspm->io_type) {
5360 hdspm->control2_register = HDSPM_BIGENDIAN_MODE;
5362 hdspm->control2_register = 0;
5365 hdspm_write(hdspm, HDSPM_control2Reg, hdspm->control2_register);
5367 hdspm_compute_period_size(hdspm);
5371 all_in_all_mixer(hdspm, 0 * UNITY_GAIN);
5373 if (hdspm_is_raydat_or_aio(hdspm))
5374 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
5377 hdspm_set_rate(hdspm, 48000, 1);
5389 struct hdspm *hdspm = (struct hdspm *) dev_id;
5394 status = hdspm_read(hdspm, HDSPM_statusRegister);
5412 dev_info(hdspm->card->dev, "snd_hdspm_interrupt %llu @ %llx\n",
5413 now-hdspm->last_interrupt, status & 0xFFC0);
5414 hdspm->last_interrupt = now;
5420 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0);
5421 hdspm->irq_count++;
5425 if (hdspm->capture_substream)
5426 snd_pcm_period_elapsed(hdspm->capture_substream);
5428 if (hdspm->playback_substream)
5429 snd_pcm_period_elapsed(hdspm->playback_substream);
5434 while (i < hdspm->midiPorts) {
5435 if ((hdspm_read(hdspm,
5436 hdspm->midi[i].statusIn) & 0xff) &&
5437 (status & hdspm->midi[i].irq)) {
5441 hdspm->control_register &= ~hdspm->midi[i].ie;
5442 hdspm_write(hdspm, HDSPM_controlRegister,
5443 hdspm->control_register);
5444 hdspm->midi[i].pending = 1;
5452 queue_work(system_highpri_wq, &hdspm->midi_work);
5466 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
5467 return hdspm_hw_pointer(hdspm);
5474 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
5478 other = hdspm->capture_substream;
5480 other = hdspm->playback_substream;
5482 if (hdspm->running)
5483 runtime->status->hw_ptr = hdspm_hw_pointer(hdspm);
5503 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
5509 spin_lock_irq(&hdspm->lock);
5512 this_pid = hdspm->playback_pid;
5513 other_pid = hdspm->capture_pid;
5515 this_pid = hdspm->capture_pid;
5516 other_pid = hdspm->playback_pid;
5526 if (params_rate(params) != hdspm->system_sample_rate) {
5527 spin_unlock_irq(&hdspm->lock);
5533 if (params_period_size(params) != hdspm->period_bytes / 4) {
5534 spin_unlock_irq(&hdspm->lock);
5542 spin_unlock_irq(&hdspm->lock);
5546 spin_lock_irq(&hdspm->lock);
5547 err = hdspm_set_rate(hdspm, params_rate(params), 0);
5549 dev_info(hdspm->card->dev, "err on hdspm_set_rate: %d\n", err);
5550 spin_unlock_irq(&hdspm->lock);
5555 spin_unlock_irq(&hdspm->lock);
5557 err = hdspm_set_interrupt_interval(hdspm,
5560 dev_info(hdspm->card->dev,
5577 dev_info(hdspm->card->dev,
5585 int c = hdspm->channel_map_out[i];
5589 hdspm_set_channel_dma_addr(hdspm, substream,
5592 snd_hdspm_enable_out(hdspm, c, 1);
5595 hdspm->playback_buffer =
5597 dev_dbg(hdspm->card->dev,
5599 hdspm->playback_buffer);
5602 int c = hdspm->channel_map_in[i];
5606 hdspm_set_channel_dma_addr(hdspm, substream,
5609 snd_hdspm_enable_in(hdspm, c, 1);
5612 hdspm->capture_buffer =
5614 dev_dbg(hdspm->card->dev,
5616 hdspm->capture_buffer);
5620 dev_dbg(hdspm->card->dev,
5627 dev_dbg(hdspm->card->dev,
5641 if (hdspm->io_type == AES32) {
5648 if (!(hdspm->control_register & HDSPe_FLOAT_FORMAT))
5649 dev_info(hdspm->card->dev,
5652 hdspm->control_register |= HDSPe_FLOAT_FORMAT;
5654 if (hdspm->control_register & HDSPe_FLOAT_FORMAT)
5655 dev_info(hdspm->card->dev,
5658 hdspm->control_register &= ~HDSPe_FLOAT_FORMAT;
5660 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
5668 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
5674 snd_hdspm_enable_out(hdspm, i, 0);
5676 hdspm->playback_buffer = NULL;
5679 snd_hdspm_enable_in(hdspm, i, 0);
5681 hdspm->capture_buffer = NULL;
5693 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
5697 if (snd_BUG_ON(channel >= hdspm->max_channels_out)) {
5698 dev_info(hdspm->card->dev,
5704 channel = array_index_nospec(channel, hdspm->max_channels_out);
5705 if (hdspm->channel_map_out[channel] < 0) {
5706 dev_info(hdspm->card->dev,
5712 info->offset = hdspm->channel_map_out[channel] *
5715 if (snd_BUG_ON(channel >= hdspm->max_channels_in)) {
5716 dev_info(hdspm->card->dev,
5722 channel = array_index_nospec(channel, hdspm->max_channels_in);
5723 if (hdspm->channel_map_in[channel] < 0) {
5724 dev_info(hdspm->card->dev,
5730 info->offset = hdspm->channel_map_in[channel] *
5761 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
5765 spin_lock(&hdspm->lock);
5766 running = hdspm->running;
5776 spin_unlock(&hdspm->lock);
5780 other = hdspm->capture_substream;
5782 other = hdspm->playback_substream;
5800 hdspm_silence_playback(hdspm);
5804 hdspm_silence_playback(hdspm);
5808 hdspm_silence_playback(hdspm);
5812 if (!hdspm->running && running)
5813 hdspm_start_audio(hdspm);
5814 else if (hdspm->running && !running)
5815 hdspm_stop_audio(hdspm);
5816 hdspm->running = running;
5817 spin_unlock(&hdspm->lock);
5880 struct hdspm *hdspm = rule->private;
5888 .min = hdspm->qs_in_channels,
5889 .max = hdspm->qs_in_channels,
5895 .min = hdspm->ds_in_channels,
5896 .max = hdspm->ds_in_channels,
5902 .min = hdspm->ss_in_channels,
5903 .max = hdspm->ss_in_channels,
5915 struct hdspm *hdspm = rule->private;
5923 .min = hdspm->qs_out_channels,
5924 .max = hdspm->qs_out_channels,
5930 .min = hdspm->ds_out_channels,
5931 .max = hdspm->ds_out_channels,
5937 .min = hdspm->ss_out_channels,
5938 .max = hdspm->ss_out_channels,
5950 struct hdspm *hdspm = rule->private;
5956 if (c->min >= hdspm->ss_in_channels) {
5963 } else if (c->max <= hdspm->qs_in_channels) {
5970 } else if (c->max <= hdspm->ds_in_channels) {
5984 struct hdspm *hdspm = rule->private;
5990 if (c->min >= hdspm->ss_out_channels) {
5997 } else if (c->max <= hdspm->qs_out_channels) {
6004 } else if (c->max <= hdspm->ds_out_channels) {
6020 struct hdspm *hdspm = rule->private;
6024 list[0] = hdspm->qs_in_channels;
6025 list[1] = hdspm->ds_in_channels;
6026 list[2] = hdspm->ss_in_channels;
6034 struct hdspm *hdspm = rule->private;
6038 list[0] = hdspm->qs_out_channels;
6039 list[1] = hdspm->ds_out_channels;
6040 list[2] = hdspm->ss_out_channels;
6058 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
6062 spin_lock_irq(&hdspm->lock);
6068 if (!hdspm->capture_substream)
6069 hdspm_stop_audio(hdspm);
6071 hdspm->playback_pid = current->pid;
6072 hdspm->playback_substream = substream;
6074 if (!hdspm->playback_substream)
6075 hdspm_stop_audio(hdspm);
6077 hdspm->capture_pid = current->pid;
6078 hdspm->capture_substream = substream;
6081 spin_unlock_irq(&hdspm->lock);
6086 switch (hdspm->io_type) {
6107 if (AES32 == hdspm->io_type) {
6115 snd_hdspm_hw_rule_rate_in_channels), hdspm,
6121 snd_hdspm_hw_rule_in_channels), hdspm,
6126 snd_hdspm_hw_rule_in_channels_rate), hdspm,
6134 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
6137 spin_lock_irq(&hdspm->lock);
6140 hdspm->playback_pid = -1;
6141 hdspm->playback_substream = NULL;
6143 hdspm->capture_pid = -1;
6144 hdspm->capture_substream = NULL;
6147 spin_unlock_irq(&hdspm->lock);
6168 struct hdspm *hdspm = hw->private_data;
6182 levels = &hdspm->peak_rms;
6185 readl(hdspm->iobase +
6188 readl(hdspm->iobase +
6191 readl(hdspm->iobase +
6195 ((uint64_t) readl(hdspm->iobase +
6197 (uint64_t) readl(hdspm->iobase +
6200 ((uint64_t)readl(hdspm->iobase +
6202 (uint64_t)readl(hdspm->iobase +
6205 ((uint64_t)readl(hdspm->iobase +
6207 (uint64_t)readl(hdspm->iobase +
6211 if (hdspm->system_sample_rate > 96000) {
6213 } else if (hdspm->system_sample_rate > 48000) {
6218 levels->status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
6222 /* dev_err(hdspm->card->dev, "copy_to_user(.., .., %lu): %lu
6230 ltc.ltc = hdspm_read(hdspm, HDSPM_RD_TCO);
6231 i = hdspm_read(hdspm, HDSPM_RD_TCO + 4);
6268 dev_err(hdspm->card->dev, "copy_to_user(.., .., %lu): %lu [LTC]\n", sizeof(struct hdspm_ltc), s); */
6277 spin_lock_irq(&hdspm->lock);
6278 info.pref_sync_ref = hdspm_pref_sync_ref(hdspm);
6279 info.wordclock_sync_check = hdspm_wc_sync_check(hdspm);
6281 info.system_sample_rate = hdspm->system_sample_rate;
6283 hdspm_external_sample_rate(hdspm);
6284 info.system_clock_mode = hdspm_system_clock_mode(hdspm);
6285 info.clock_source = hdspm_clock_source(hdspm);
6286 info.autosync_ref = hdspm_autosync_ref(hdspm);
6287 info.line_out = hdspm_toggle_setting(hdspm, HDSPM_LineOut);
6289 spin_unlock_irq(&hdspm->lock);
6297 status.card_type = hdspm->io_type;
6299 status.autosync_source = hdspm_autosync_ref(hdspm);
6302 status.master_period = hdspm_read(hdspm, HDSPM_RD_PLL_FREQ);
6304 switch (hdspm->io_type) {
6308 hdspm_wc_sync_check(hdspm);
6310 hdspm_madi_sync_check(hdspm);
6312 hdspm_tco_sync_check(hdspm);
6314 hdspm_sync_in_sync_check(hdspm);
6317 hdspm_read(hdspm, HDSPM_statusRegister);
6338 hdspm_version.card_type = hdspm->io_type;
6339 strlcpy(hdspm_version.cardname, hdspm->card_name,
6341 hdspm_version.serial = hdspm->serial;
6342 hdspm_version.firmware_rev = hdspm->firmware_rev;
6344 if (hdspm->tco)
6355 if (copy_to_user((void __user *)mixer.mixer, hdspm->mixer,
6378 struct hdspm *hdspm)
6387 hdspm->hwdep = hw;
6388 hw->private_data = hdspm;
6403 static int snd_hdspm_preallocate_memory(struct hdspm *hdspm)
6408 pcm = hdspm->pcm;
6413 &hdspm->pci->dev,
6415 dev_dbg(hdspm->card->dev, " Preallocated %zd Bytes\n", wanted);
6421 static void hdspm_set_channel_dma_addr(struct hdspm *hdspm,
6428 hdspm_write(hdspm, reg + 4 * i,
6435 struct hdspm *hdspm)
6440 err = snd_pcm_new(card, hdspm->card_name, 0, 1, 1, &pcm);
6444 hdspm->pcm = pcm;
6445 pcm->private_data = hdspm;
6446 strcpy(pcm->name, hdspm->card_name);
6455 err = snd_hdspm_preallocate_memory(hdspm);
6462 static inline void snd_hdspm_initialize_midi_flush(struct hdspm * hdspm)
6466 for (i = 0; i < hdspm->midiPorts; i++)
6467 snd_hdspm_flush_midi_input(hdspm, i);
6471 struct hdspm *hdspm)
6476 err = snd_hdspm_create_pcm(card, hdspm);
6481 while (i < hdspm->midiPorts) {
6482 err = snd_hdspm_create_midi(card, hdspm, i);
6489 err = snd_hdspm_create_controls(card, hdspm);
6493 err = snd_hdspm_create_hwdep(card, hdspm);
6498 snd_hdspm_proc_init(hdspm);
6500 hdspm->system_sample_rate = -1;
6501 hdspm->last_external_sample_rate = -1;
6502 hdspm->last_internal_sample_rate = -1;
6503 hdspm->playback_pid = -1;
6504 hdspm->capture_pid = -1;
6505 hdspm->capture_substream = NULL;
6506 hdspm->playback_substream = NULL;
6509 err = snd_hdspm_set_defaults(hdspm);
6514 hdspm_update_simple_mixer_controls(hdspm);
6530 struct hdspm *hdspm)
6533 struct pci_dev *pci = hdspm->pci;
6537 hdspm->irq = -1;
6538 hdspm->card = card;
6540 spin_lock_init(&hdspm->lock);
6541 INIT_WORK(&hdspm->midi_work, hdspm_midi_work);
6543 pci_read_config_word(hdspm->pci,
6544 PCI_CLASS_REVISION, &hdspm->firmware_rev);
6549 switch (hdspm->firmware_rev) {
6551 hdspm->io_type = RayDAT;
6552 hdspm->card_name = "RME RayDAT";
6553 hdspm->midiPorts = 2;
6556 hdspm->io_type = AIO;
6557 hdspm->card_name = "RME AIO";
6558 hdspm->midiPorts = 1;
6561 hdspm->io_type = MADIface;
6562 hdspm->card_name = "RME MADIface";
6563 hdspm->midiPorts = 1;
6566 if ((hdspm->firmware_rev == 0xf0) ||
6567 ((hdspm->firmware_rev >= 0xe6) &&
6568 (hdspm->firmware_rev <= 0xea))) {
6569 hdspm->io_type = AES32;
6570 hdspm->card_name = "RME AES32";
6571 hdspm->midiPorts = 2;
6572 } else if ((hdspm->firmware_rev == 0xd2) ||
6573 ((hdspm->firmware_rev >= 0xc8) &&
6574 (hdspm->firmware_rev <= 0xcf))) {
6575 hdspm->io_type = MADI;
6576 hdspm->card_name = "RME MADI";
6577 hdspm->midiPorts = 3;
6581 hdspm->firmware_rev);
6590 pci_set_master(hdspm->pci);
6592 err = pci_request_regions(pci, "hdspm");
6596 hdspm->port = pci_resource_start(pci, 0);
6600 hdspm->port, hdspm->port + io_extent - 1);
6602 hdspm->iobase = ioremap(hdspm->port, io_extent);
6603 if (!hdspm->iobase) {
6605 hdspm->port, hdspm->port + io_extent - 1);
6609 (unsigned long)hdspm->iobase, hdspm->port,
6610 hdspm->port + io_extent - 1);
6613 IRQF_SHARED, KBUILD_MODNAME, hdspm)) {
6620 hdspm->irq = pci->irq;
6621 card->sync_irq = hdspm->irq;
6624 sizeof(*hdspm->mixer));
6625 hdspm->mixer = kzalloc(sizeof(*hdspm->mixer), GFP_KERNEL);
6626 if (!hdspm->mixer)
6629 hdspm->port_names_in = NULL;
6630 hdspm->port_names_out = NULL;
6632 switch (hdspm->io_type) {
6634 hdspm->ss_in_channels = hdspm->ss_out_channels = AES32_CHANNELS;
6635 hdspm->ds_in_channels = hdspm->ds_out_channels = AES32_CHANNELS;
6636 hdspm->qs_in_channels = hdspm->qs_out_channels = AES32_CHANNELS;
6638 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6640 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6642 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6644 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6646 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6648 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6651 hdspm->max_channels_out = hdspm->max_channels_in =
6653 hdspm->port_names_in = hdspm->port_names_out =
6655 hdspm->channel_map_in = hdspm->channel_map_out =
6662 hdspm->ss_in_channels = hdspm->ss_out_channels =
6664 hdspm->ds_in_channels = hdspm->ds_out_channels =
6666 hdspm->qs_in_channels = hdspm->qs_out_channels =
6669 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6671 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6673 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6676 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6678 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6680 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6685 hdspm->ss_in_channels = AIO_IN_SS_CHANNELS;
6686 hdspm->ds_in_channels = AIO_IN_DS_CHANNELS;
6687 hdspm->qs_in_channels = AIO_IN_QS_CHANNELS;
6688 hdspm->ss_out_channels = AIO_OUT_SS_CHANNELS;
6689 hdspm->ds_out_channels = AIO_OUT_DS_CHANNELS;
6690 hdspm->qs_out_channels = AIO_OUT_QS_CHANNELS;
6692 if (0 == (hdspm_read(hdspm, HDSPM_statusRegister2) & HDSPM_s2_AEBI_D)) {
6694 hdspm->ss_in_channels += 4;
6695 hdspm->ds_in_channels += 4;
6696 hdspm->qs_in_channels += 4;
6699 if (0 == (hdspm_read(hdspm, HDSPM_statusRegister2) & HDSPM_s2_AEBO_D)) {
6701 hdspm->ss_out_channels += 4;
6702 hdspm->ds_out_channels += 4;
6703 hdspm->qs_out_channels += 4;
6706 hdspm->channel_map_out_ss = channel_map_aio_out_ss;
6707 hdspm->channel_map_out_ds = channel_map_aio_out_ds;
6708 hdspm->channel_map_out_qs = channel_map_aio_out_qs;
6710 hdspm->channel_map_in_ss = channel_map_aio_in_ss;
6711 hdspm->channel_map_in_ds = channel_map_aio_in_ds;
6712 hdspm->channel_map_in_qs = channel_map_aio_in_qs;
6714 hdspm->port_names_in_ss = texts_ports_aio_in_ss;
6715 hdspm->port_names_out_ss = texts_ports_aio_out_ss;
6716 hdspm->port_names_in_ds = texts_ports_aio_in_ds;
6717 hdspm->port_names_out_ds = texts_ports_aio_out_ds;
6718 hdspm->port_names_in_qs = texts_ports_aio_in_qs;
6719 hdspm->port_names_out_qs = texts_ports_aio_out_qs;
6724 hdspm->ss_in_channels = hdspm->ss_out_channels =
6726 hdspm->ds_in_channels = hdspm->ds_out_channels =
6728 hdspm->qs_in_channels = hdspm->qs_out_channels =
6731 hdspm->max_channels_in = RAYDAT_SS_CHANNELS;
6732 hdspm->max_channels_out = RAYDAT_SS_CHANNELS;
6734 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6736 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6738 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6740 hdspm->channel_map_in = hdspm->channel_map_out =
6743 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6745 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6747 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6756 switch (hdspm->io_type) {
6759 if (hdspm_read(hdspm, HDSPM_statusRegister2) &
6761 hdspm->midiPorts++;
6762 hdspm->tco = kzalloc(sizeof(*hdspm->tco), GFP_KERNEL);
6763 if (hdspm->tco)
6764 hdspm_tco_write(hdspm);
6768 hdspm->tco = NULL;
6774 if (hdspm_read(hdspm, HDSPM_statusRegister) & HDSPM_tco_detect) {
6775 hdspm->midiPorts++;
6776 hdspm->tco = kzalloc(sizeof(*hdspm->tco), GFP_KERNEL);
6777 if (hdspm->tco)
6778 hdspm_tco_write(hdspm);
6782 hdspm->tco = NULL;
6787 hdspm->tco = NULL;
6791 switch (hdspm->io_type) {
6793 if (hdspm->tco) {
6794 hdspm->texts_autosync = texts_autosync_aes_tco;
6795 hdspm->texts_autosync_items =
6798 hdspm->texts_autosync = texts_autosync_aes;
6799 hdspm->texts_autosync_items =
6805 if (hdspm->tco) {
6806 hdspm->texts_autosync = texts_autosync_madi_tco;
6807 hdspm->texts_autosync_items = 4;
6809 hdspm->texts_autosync = texts_autosync_madi;
6810 hdspm->texts_autosync_items = 3;
6819 if (hdspm->tco) {
6820 hdspm->texts_autosync = texts_autosync_raydat_tco;
6821 hdspm->texts_autosync_items = 9;
6823 hdspm->texts_autosync = texts_autosync_raydat;
6824 hdspm->texts_autosync_items = 8;
6829 if (hdspm->tco) {
6830 hdspm->texts_autosync = texts_autosync_aio_tco;
6831 hdspm->texts_autosync_items = 6;
6833 hdspm->texts_autosync = texts_autosync_aio;
6834 hdspm->texts_autosync_items = 5;
6840 if (hdspm->io_type != MADIface) {
6841 hdspm->serial = (hdspm_read(hdspm,
6852 if (!id[hdspm->dev] && hdspm->serial != 0xFFFFFF) {
6854 "HDSPMx%06x", hdspm->serial);
6860 err = snd_hdspm_create_alsa_devices(card, hdspm);
6864 snd_hdspm_initialize_midi_flush(hdspm);
6870 static int snd_hdspm_free(struct hdspm * hdspm)
6873 if (hdspm->port) {
6874 cancel_work_sync(&hdspm->midi_work);
6877 hdspm->control_register &=
6881 hdspm_write(hdspm, HDSPM_controlRegister,
6882 hdspm->control_register);
6885 if (hdspm->irq >= 0)
6886 free_irq(hdspm->irq, (void *) hdspm);
6888 kfree(hdspm->mixer);
6889 iounmap(hdspm->iobase);
6891 if (hdspm->port)
6892 pci_release_regions(hdspm->pci);
6894 if (pci_is_enabled(hdspm->pci))
6895 pci_disable_device(hdspm->pci);
6902 struct hdspm *hdspm = card->private_data;
6904 if (hdspm)
6905 snd_hdspm_free(hdspm);
6913 struct hdspm *hdspm;
6925 THIS_MODULE, sizeof(*hdspm), &card);
6929 hdspm = card->private_data;
6931 hdspm->dev = dev;
6932 hdspm->pci = pci;
6934 err = snd_hdspm_create(card, hdspm);
6938 if (hdspm->io_type != MADIface) {
6940 hdspm->card_name, hdspm->serial);
6943 hdspm->card_name, hdspm->serial,
6944 hdspm->port, hdspm->irq);
6947 hdspm->card_name);
6950 hdspm->card_name, hdspm->port, hdspm->irq);