Lines Matching refs:areg
223 u32 areg; /* cached additional register value */
505 rme96->areg |= RME96_AR_CDATA;
507 rme96->areg &= ~RME96_AR_CDATA;
509 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);
510 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
512 rme96->areg |= RME96_AR_CCLK;
513 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
517 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);
518 rme96->areg |= RME96_AR_CLATCH;
519 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
521 rme96->areg &= ~RME96_AR_CLATCH;
522 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
612 if (rme96->areg & RME96_AR_ANALOG) {
614 n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +
615 (((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);
629 return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;
757 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
761 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
765 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
772 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
779 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
783 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
789 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
801 rme96->areg &= ~RME96_AR_WSEL;
806 rme96->areg &= ~RME96_AR_WSEL;
811 rme96->areg |= RME96_AR_WSEL;
817 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
824 if (rme96->areg & RME96_AR_WSEL) {
866 rme96->areg |= RME96_AR_ANALOG;
867 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
885 rme96->areg &= ~RME96_AR_ANALOG;
886 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
895 if (rme96->areg & RME96_AR_ANALOG) {
1568 rme96->areg &= ~RME96_AR_DAC_EN;
1569 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1683 rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */
1686 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1689 writel(rme96->areg | RME96_AR_PD2,
1691 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1695 rme96->areg |= RME96_AR_DAC_EN;
1696 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1791 if (rme96->areg & RME96_AR_WSEL) {
2385 rme96->areg &= ~RME96_AR_DAC_EN;
2386 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2408 writel(rme96->areg | RME96_AR_PD2,
2410 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2414 rme96->areg |= RME96_AR_DAC_EN;
2415 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);