Lines Matching defs:rme96
213 struct rme96 {
261 #define RME96_ISPLAYING(rme96) ((rme96)->wcreg & RME96_WCR_START)
262 #define RME96_ISRECORDING(rme96) ((rme96)->wcreg & RME96_WCR_START_2)
263 #define RME96_HAS_ANALOG_IN(rme96) ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST)
264 #define RME96_HAS_ANALOG_OUT(rme96) ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PRO || \
265 (rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST)
266 #define RME96_DAC_IS_1852(rme96) (RME96_HAS_ANALOG_OUT(rme96) && (rme96)->rev >= 4)
267 #define RME96_DAC_IS_1855(rme96) (((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST && (rme96)->rev < 4) || \
268 ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PRO && (rme96)->rev == 2))
269 #define RME96_185X_MAX_OUT(rme96) ((1 << (RME96_DAC_IS_1852(rme96) ? RME96_AD1852_VOL_BITS : RME96_AD1855_VOL_BITS)) - 1)
291 static void snd_rme96_proc_init(struct rme96 *rme96);
295 struct rme96 *rme96);
298 snd_rme96_getinputtype(struct rme96 *rme96);
301 snd_rme96_playback_ptr(struct rme96 *rme96)
303 return (readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
304 & RME96_RCR_AUDIO_ADDR_MASK) >> rme96->playback_frlog;
308 snd_rme96_capture_ptr(struct rme96 *rme96)
310 return (readl(rme96->iobase + RME96_IO_GET_REC_POS)
311 & RME96_RCR_AUDIO_ADDR_MASK) >> rme96->capture_frlog;
318 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
320 memset_io(rme96->iobase + RME96_IO_PLAY_BUFFER + pos,
330 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
332 return copy_from_user_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos,
341 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
343 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, src, count);
352 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
355 rme96->iobase + RME96_IO_REC_BUFFER + pos,
364 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
366 memcpy_fromio(dst, rme96->iobase + RME96_IO_REC_BUFFER + pos, count);
499 snd_rme96_write_SPI(struct rme96 *rme96, u16 val)
505 rme96->areg |= RME96_AR_CDATA;
507 rme96->areg &= ~RME96_AR_CDATA;
509 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);
510 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
512 rme96->areg |= RME96_AR_CCLK;
513 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
517 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);
518 rme96->areg |= RME96_AR_CLATCH;
519 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
521 rme96->areg &= ~RME96_AR_CLATCH;
522 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
526 snd_rme96_apply_dac_volume(struct rme96 *rme96)
528 if (RME96_DAC_IS_1852(rme96)) {
529 snd_rme96_write_SPI(rme96, (rme96->vol[0] << 2) | 0x0);
530 snd_rme96_write_SPI(rme96, (rme96->vol[1] << 2) | 0x2);
531 } else if (RME96_DAC_IS_1855(rme96)) {
532 snd_rme96_write_SPI(rme96, (rme96->vol[0] & 0x3FF) | 0x000);
533 snd_rme96_write_SPI(rme96, (rme96->vol[1] & 0x3FF) | 0x400);
538 snd_rme96_reset_dac(struct rme96 *rme96)
540 writel(rme96->wcreg | RME96_WCR_PD,
541 rme96->iobase + RME96_IO_CONTROL_REGISTER);
542 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
546 snd_rme96_getmontracks(struct rme96 *rme96)
548 return ((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_0) & 1) +
549 (((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_1) & 1) << 1);
553 snd_rme96_setmontracks(struct rme96 *rme96,
557 rme96->wcreg |= RME96_WCR_MONITOR_0;
559 rme96->wcreg &= ~RME96_WCR_MONITOR_0;
562 rme96->wcreg |= RME96_WCR_MONITOR_1;
564 rme96->wcreg &= ~RME96_WCR_MONITOR_1;
566 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
571 snd_rme96_getattenuation(struct rme96 *rme96)
573 return ((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_0) & 1) +
574 (((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_1) & 1) << 1);
578 snd_rme96_setattenuation(struct rme96 *rme96,
583 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) &
587 rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) &
591 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) |
595 rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) |
601 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
606 snd_rme96_capture_getrate(struct rme96 *rme96,
612 if (rme96->areg & RME96_AR_ANALOG) {
614 n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +
615 (((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);
629 return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;
632 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
633 if (rme96->rcreg & RME96_RCR_LOCK) {
636 if (rme96->rcreg & RME96_RCR_T_OUT) {
642 if (rme96->rcreg & RME96_RCR_VERF) {
647 n = ((rme96->rcreg >> RME96_RCR_BITPOS_F0) & 1) +
648 (((rme96->rcreg >> RME96_RCR_BITPOS_F1) & 1) << 1) +
649 (((rme96->rcreg >> RME96_RCR_BITPOS_F2) & 1) << 2);
653 if (rme96->rcreg & RME96_RCR_T_OUT) {
669 snd_rme96_playback_getrate(struct rme96 *rme96)
673 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
674 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
675 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
680 rate = ((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_0) & 1) +
681 (((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_1) & 1) << 1);
695 return (rme96->wcreg & RME96_WCR_DS) ? rate << 1 : rate;
699 snd_rme96_playback_setrate(struct rme96 *rme96,
704 ds = rme96->wcreg & RME96_WCR_DS;
707 rme96->wcreg &= ~RME96_WCR_DS;
708 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) &
712 rme96->wcreg &= ~RME96_WCR_DS;
713 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) &
717 rme96->wcreg &= ~RME96_WCR_DS;
718 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) |
722 rme96->wcreg |= RME96_WCR_DS;
723 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) &
727 rme96->wcreg |= RME96_WCR_DS;
728 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) &
732 rme96->wcreg |= RME96_WCR_DS;
733 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) |
739 if ((!ds && rme96->wcreg & RME96_WCR_DS) ||
740 (ds && !(rme96->wcreg & RME96_WCR_DS)))
743 snd_rme96_reset_dac(rme96);
746 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
752 snd_rme96_capture_analog_setrate(struct rme96 *rme96,
757 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
761 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
765 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
769 if (rme96->rev < 4) {
772 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
776 if (rme96->rev < 4) {
779 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
783 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
789 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
794 snd_rme96_setclockmode(struct rme96 *rme96,
800 rme96->wcreg &= ~RME96_WCR_MASTER;
801 rme96->areg &= ~RME96_AR_WSEL;
805 rme96->wcreg |= RME96_WCR_MASTER;
806 rme96->areg &= ~RME96_AR_WSEL;
810 rme96->wcreg |= RME96_WCR_MASTER;
811 rme96->areg |= RME96_AR_WSEL;
816 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
817 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
822 snd_rme96_getclockmode(struct rme96 *rme96)
824 if (rme96->areg & RME96_AR_WSEL) {
827 return (rme96->wcreg & RME96_WCR_MASTER) ? RME96_CLOCKMODE_MASTER :
832 snd_rme96_setinputtype(struct rme96 *rme96,
839 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) &
843 rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) &
847 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) |
851 if ((rme96->pci->device != PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST &&
852 rme96->pci->device != PCI_DEVICE_ID_RME_DIGI96_8_PRO) ||
853 (rme96->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST &&
854 rme96->rev > 4))
859 rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) |
863 if (!RME96_HAS_ANALOG_IN(rme96)) {
866 rme96->areg |= RME96_AR_ANALOG;
867 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
868 if (rme96->rev < 4) {
873 if (snd_rme96_capture_getrate(rme96, &n) == 88200) {
874 snd_rme96_capture_analog_setrate(rme96, 44100);
876 if (snd_rme96_capture_getrate(rme96, &n) == 64000) {
877 snd_rme96_capture_analog_setrate(rme96, 32000);
884 if (type != RME96_INPUT_ANALOG && RME96_HAS_ANALOG_IN(rme96)) {
885 rme96->areg &= ~RME96_AR_ANALOG;
886 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
888 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
893 snd_rme96_getinputtype(struct rme96 *rme96)
895 if (rme96->areg & RME96_AR_ANALOG) {
898 return ((rme96->wcreg >> RME96_WCR_BITPOS_INP_0) & 1) +
899 (((rme96->wcreg >> RME96_WCR_BITPOS_INP_1) & 1) << 1);
903 snd_rme96_setframelog(struct rme96 *rme96,
916 frlog += (rme96->wcreg & RME96_WCR_MODE24) ? 2 : 1;
917 rme96->playback_frlog = frlog;
919 frlog += (rme96->wcreg & RME96_WCR_MODE24_2) ? 2 : 1;
920 rme96->capture_frlog = frlog;
925 snd_rme96_playback_setformat(struct rme96 *rme96, snd_pcm_format_t format)
929 rme96->wcreg &= ~RME96_WCR_MODE24;
932 rme96->wcreg |= RME96_WCR_MODE24;
937 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
942 snd_rme96_capture_setformat(struct rme96 *rme96, snd_pcm_format_t format)
946 rme96->wcreg &= ~RME96_WCR_MODE24_2;
949 rme96->wcreg |= RME96_WCR_MODE24_2;
954 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
959 snd_rme96_set_period_properties(struct rme96 *rme96,
964 rme96->wcreg &= ~RME96_WCR_ISEL;
967 rme96->wcreg |= RME96_WCR_ISEL;
973 rme96->wcreg &= ~RME96_WCR_IDIS;
974 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
981 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
986 runtime->dma_area = (void __force *)(rme96->iobase +
988 runtime->dma_addr = rme96->port + RME96_IO_PLAY_BUFFER;
991 spin_lock_irq(&rme96->lock);
992 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
993 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
994 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
1002 err = snd_rme96_playback_setrate(rme96, params_rate(params));
1008 err = snd_rme96_playback_setformat(rme96, params_format(params));
1011 snd_rme96_setframelog(rme96, params_channels(params), 1);
1012 if (rme96->capture_periodsize != 0) {
1013 if (params_period_size(params) << rme96->playback_frlog !=
1014 rme96->capture_periodsize)
1020 rme96->playback_periodsize =
1021 params_period_size(params) << rme96->playback_frlog;
1022 snd_rme96_set_period_properties(rme96, rme96->playback_periodsize);
1024 if ((rme96->wcreg & RME96_WCR_ADAT) == 0) {
1025 rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP);
1026 writel(rme96->wcreg |= rme96->wcreg_spdif_stream, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1031 spin_unlock_irq(&rme96->lock);
1034 snd_rme96_apply_dac_volume(rme96);
1044 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1048 runtime->dma_area = (void __force *)(rme96->iobase +
1050 runtime->dma_addr = rme96->port + RME96_IO_REC_BUFFER;
1053 spin_lock_irq(&rme96->lock);
1054 if ((err = snd_rme96_capture_setformat(rme96, params_format(params))) < 0) {
1055 spin_unlock_irq(&rme96->lock);
1058 if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1059 if ((err = snd_rme96_capture_analog_setrate(rme96,
1062 spin_unlock_irq(&rme96->lock);
1065 } else if ((rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0) {
1067 spin_unlock_irq(&rme96->lock);
1073 spin_unlock_irq(&rme96->lock);
1077 snd_rme96_setframelog(rme96, params_channels(params), 0);
1078 if (rme96->playback_periodsize != 0) {
1079 if (params_period_size(params) << rme96->capture_frlog !=
1080 rme96->playback_periodsize)
1082 spin_unlock_irq(&rme96->lock);
1086 rme96->capture_periodsize =
1087 params_period_size(params) << rme96->capture_frlog;
1088 snd_rme96_set_period_properties(rme96, rme96->capture_periodsize);
1089 spin_unlock_irq(&rme96->lock);
1095 snd_rme96_trigger(struct rme96 *rme96,
1099 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1101 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1103 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1104 if (rme96->rcreg & RME96_RCR_IRQ)
1105 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1108 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1109 if (rme96->rcreg & RME96_RCR_IRQ_2)
1110 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1113 rme96->wcreg |= RME96_WCR_START;
1115 rme96->wcreg &= ~RME96_WCR_START;
1117 rme96->wcreg |= RME96_WCR_START_2;
1119 rme96->wcreg &= ~RME96_WCR_START_2;
1120 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1129 struct rme96 *rme96 = (struct rme96 *)dev_id;
1131 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1133 if (!((rme96->rcreg & RME96_RCR_IRQ) ||
1134 (rme96->rcreg & RME96_RCR_IRQ_2)))
1139 if (rme96->rcreg & RME96_RCR_IRQ) {
1141 snd_pcm_period_elapsed(rme96->playback_substream);
1142 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1144 if (rme96->rcreg & RME96_RCR_IRQ_2) {
1146 snd_pcm_period_elapsed(rme96->capture_substream);
1147 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1161 rme96_set_buffer_size_constraint(struct rme96 *rme96,
1168 if ((size = rme96->playback_periodsize) != 0 ||
1169 (size = rme96->capture_periodsize) != 0)
1183 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1187 spin_lock_irq(&rme96->lock);
1188 if (rme96->playback_substream) {
1189 spin_unlock_irq(&rme96->lock);
1192 rme96->wcreg &= ~RME96_WCR_ADAT;
1193 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1194 rme96->playback_substream = substream;
1195 spin_unlock_irq(&rme96->lock);
1198 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
1199 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
1200 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
1207 rme96_set_buffer_size_constraint(rme96, runtime);
1209 rme96->wcreg_spdif_stream = rme96->wcreg_spdif;
1210 rme96->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1211 snd_ctl_notify(rme96->card, SNDRV_CTL_EVENT_MASK_VALUE |
1212 SNDRV_CTL_EVENT_MASK_INFO, &rme96->spdif_ctl->id);
1220 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1225 if (snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
1226 (rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0)
1236 spin_lock_irq(&rme96->lock);
1237 if (rme96->capture_substream) {
1238 spin_unlock_irq(&rme96->lock);
1241 rme96->capture_substream = substream;
1242 spin_unlock_irq(&rme96->lock);
1244 rme96_set_buffer_size_constraint(rme96, runtime);
1252 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1256 spin_lock_irq(&rme96->lock);
1257 if (rme96->playback_substream) {
1258 spin_unlock_irq(&rme96->lock);
1261 rme96->wcreg |= RME96_WCR_ADAT;
1262 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1263 rme96->playback_substream = substream;
1264 spin_unlock_irq(&rme96->lock);
1267 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
1268 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
1269 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
1276 rme96_set_buffer_size_constraint(rme96, runtime);
1284 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1289 if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1294 if ((rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0) {
1303 spin_lock_irq(&rme96->lock);
1304 if (rme96->capture_substream) {
1305 spin_unlock_irq(&rme96->lock);
1308 rme96->capture_substream = substream;
1309 spin_unlock_irq(&rme96->lock);
1311 rme96_set_buffer_size_constraint(rme96, runtime);
1318 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1321 spin_lock_irq(&rme96->lock);
1322 if (RME96_ISPLAYING(rme96)) {
1323 snd_rme96_trigger(rme96, RME96_STOP_PLAYBACK);
1325 rme96->playback_substream = NULL;
1326 rme96->playback_periodsize = 0;
1327 spdif = (rme96->wcreg & RME96_WCR_ADAT) == 0;
1328 spin_unlock_irq(&rme96->lock);
1330 rme96->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1331 snd_ctl_notify(rme96->card, SNDRV_CTL_EVENT_MASK_VALUE |
1332 SNDRV_CTL_EVENT_MASK_INFO, &rme96->spdif_ctl->id);
1340 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1342 spin_lock_irq(&rme96->lock);
1343 if (RME96_ISRECORDING(rme96)) {
1344 snd_rme96_trigger(rme96, RME96_STOP_CAPTURE);
1346 rme96->capture_substream = NULL;
1347 rme96->capture_periodsize = 0;
1348 spin_unlock_irq(&rme96->lock);
1355 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1357 spin_lock_irq(&rme96->lock);
1358 if (RME96_ISPLAYING(rme96)) {
1359 snd_rme96_trigger(rme96, RME96_STOP_PLAYBACK);
1361 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1362 spin_unlock_irq(&rme96->lock);
1369 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1371 spin_lock_irq(&rme96->lock);
1372 if (RME96_ISRECORDING(rme96)) {
1373 snd_rme96_trigger(rme96, RME96_STOP_CAPTURE);
1375 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1376 spin_unlock_irq(&rme96->lock);
1384 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1389 if (snd_pcm_substream_chip(s) == rme96)
1393 sync = (rme96->playback_substream && rme96->capture_substream) &&
1394 (rme96->playback_substream->group ==
1395 rme96->capture_substream->group);
1399 if (!RME96_ISPLAYING(rme96)) {
1400 if (substream != rme96->playback_substream)
1402 snd_rme96_trigger(rme96, sync ? RME96_START_BOTH
1409 if (RME96_ISPLAYING(rme96)) {
1410 if (substream != rme96->playback_substream)
1412 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1418 if (RME96_ISPLAYING(rme96))
1419 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1425 if (!RME96_ISPLAYING(rme96))
1426 snd_rme96_trigger(rme96, sync ? RME96_RESUME_BOTH
1441 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1446 if (snd_pcm_substream_chip(s) == rme96)
1450 sync = (rme96->playback_substream && rme96->capture_substream) &&
1451 (rme96->playback_substream->group ==
1452 rme96->capture_substream->group);
1456 if (!RME96_ISRECORDING(rme96)) {
1457 if (substream != rme96->capture_substream)
1459 snd_rme96_trigger(rme96, sync ? RME96_START_BOTH
1466 if (RME96_ISRECORDING(rme96)) {
1467 if (substream != rme96->capture_substream)
1469 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1475 if (RME96_ISRECORDING(rme96))
1476 snd_rme96_trigger(rme96, sync ? RME96_STOP_BOTH
1482 if (!RME96_ISRECORDING(rme96))
1483 snd_rme96_trigger(rme96, sync ? RME96_RESUME_BOTH
1497 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1498 return snd_rme96_playback_ptr(rme96);
1504 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1505 return snd_rme96_capture_ptr(rme96);
1561 struct rme96 *rme96 = (struct rme96 *)private_data;
1563 if (!rme96)
1566 if (rme96->irq >= 0) {
1567 snd_rme96_trigger(rme96, RME96_STOP_BOTH);
1568 rme96->areg &= ~RME96_AR_DAC_EN;
1569 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1570 free_irq(rme96->irq, (void *)rme96);
1571 rme96->irq = -1;
1573 if (rme96->iobase) {
1574 iounmap(rme96->iobase);
1575 rme96->iobase = NULL;
1577 if (rme96->port) {
1578 pci_release_regions(rme96->pci);
1579 rme96->port = 0;
1582 vfree(rme96->playback_suspend_buffer);
1583 vfree(rme96->capture_suspend_buffer);
1585 pci_disable_device(rme96->pci);
1591 struct rme96 *rme96 = pcm->private_data;
1592 rme96->spdif_pcm = NULL;
1598 struct rme96 *rme96 = pcm->private_data;
1599 rme96->adat_pcm = NULL;
1603 snd_rme96_create(struct rme96 *rme96)
1605 struct pci_dev *pci = rme96->pci;
1608 rme96->irq = -1;
1609 spin_lock_init(&rme96->lock);
1616 rme96->port = pci_resource_start(rme96->pci, 0);
1618 rme96->iobase = ioremap(rme96->port, RME96_IO_SIZE);
1619 if (!rme96->iobase) {
1620 dev_err(rme96->card->dev,
1622 rme96->port, rme96->port + RME96_IO_SIZE - 1);
1627 KBUILD_MODNAME, rme96)) {
1628 dev_err(rme96->card->dev, "unable to grab IRQ %d\n", pci->irq);
1631 rme96->irq = pci->irq;
1632 rme96->card->sync_irq = rme96->irq;
1635 pci_read_config_byte(pci, 8, &rme96->rev);
1638 if ((err = snd_pcm_new(rme96->card, "Digi96 IEC958", 0,
1639 1, 1, &rme96->spdif_pcm)) < 0)
1643 rme96->spdif_pcm->private_data = rme96;
1644 rme96->spdif_pcm->private_free = snd_rme96_free_spdif_pcm;
1645 strcpy(rme96->spdif_pcm->name, "Digi96 IEC958");
1646 snd_pcm_set_ops(rme96->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme96_playback_spdif_ops);
1647 snd_pcm_set_ops(rme96->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme96_capture_spdif_ops);
1649 rme96->spdif_pcm->info_flags = 0;
1654 rme96->adat_pcm = NULL;
1656 if ((err = snd_pcm_new(rme96->card, "Digi96 ADAT", 1,
1657 1, 1, &rme96->adat_pcm)) < 0)
1661 rme96->adat_pcm->private_data = rme96;
1662 rme96->adat_pcm->private_free = snd_rme96_free_adat_pcm;
1663 strcpy(rme96->adat_pcm->name, "Digi96 ADAT");
1664 snd_pcm_set_ops(rme96->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme96_playback_adat_ops);
1665 snd_pcm_set_ops(rme96->adat_pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme96_capture_adat_ops);
1667 rme96->adat_pcm->info_flags = 0;
1670 rme96->playback_periodsize = 0;
1671 rme96->capture_periodsize = 0;
1674 snd_rme96_trigger(rme96, RME96_STOP_BOTH);
1677 rme96->wcreg =
1683 rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */
1685 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1686 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1689 writel(rme96->areg | RME96_AR_PD2,
1690 rme96->iobase + RME96_IO_ADDITIONAL_REG);
1691 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1694 snd_rme96_reset_dac(rme96);
1695 rme96->areg |= RME96_AR_DAC_EN;
1696 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1699 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1700 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1703 rme96->vol[0] = rme96->vol[1] = 0;
1704 if (RME96_HAS_ANALOG_OUT(rme96)) {
1705 snd_rme96_apply_dac_volume(rme96);
1709 if ((err = snd_rme96_create_switches(rme96->card, rme96)) < 0) {
1714 snd_rme96_proc_init(rme96);
1727 struct rme96 *rme96 = entry->private_data;
1729 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1731 snd_iprintf(buffer, rme96->card->longname);
1732 snd_iprintf(buffer, " (index #%d)\n", rme96->card->number + 1);
1735 if (rme96->wcreg & RME96_WCR_IDIS) {
1738 } else if (rme96->wcreg & RME96_WCR_ISEL) {
1744 switch (snd_rme96_getinputtype(rme96)) {
1761 if (snd_rme96_capture_getrate(rme96, &n) < 0) {
1770 snd_rme96_capture_getrate(rme96, &n));
1772 if (rme96->wcreg & RME96_WCR_MODE24_2) {
1779 if (rme96->wcreg & RME96_WCR_SEL) {
1785 snd_rme96_playback_getrate(rme96));
1786 if (rme96->wcreg & RME96_WCR_MODE24) {
1791 if (rme96->areg & RME96_AR_WSEL) {
1793 } else if (rme96->wcreg & RME96_WCR_MASTER) {
1795 } else if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1797 } else if (snd_rme96_capture_getrate(rme96, &n) < 0) {
1802 if (rme96->wcreg & RME96_WCR_PRO) {
1807 if (rme96->wcreg & RME96_WCR_EMP) {
1812 if (rme96->wcreg & RME96_WCR_DOLBY) {
1817 if (RME96_HAS_ANALOG_IN(rme96)) {
1819 switch (snd_rme96_getmontracks(rme96)) {
1833 switch (snd_rme96_getattenuation(rme96)) {
1847 snd_iprintf(buffer, " volume left: %u\n", rme96->vol[0]);
1848 snd_iprintf(buffer, " volume right: %u\n", rme96->vol[1]);
1852 static void snd_rme96_proc_init(struct rme96 *rme96)
1854 snd_card_ro_proc_new(rme96->card, "rme96", rme96, snd_rme96_proc_read);
1866 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1868 spin_lock_irq(&rme96->lock);
1869 ucontrol->value.integer.value[0] = rme96->wcreg & RME96_WCR_SEL ? 0 : 1;
1870 spin_unlock_irq(&rme96->lock);
1876 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1881 spin_lock_irq(&rme96->lock);
1882 val = (rme96->wcreg & ~RME96_WCR_SEL) | val;
1883 change = val != rme96->wcreg;
1884 rme96->wcreg = val;
1885 writel(val, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1886 spin_unlock_irq(&rme96->lock);
1896 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1902 switch (rme96->pci->device) {
1911 if (rme96->rev > 4) {
1929 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1932 spin_lock_irq(&rme96->lock);
1933 ucontrol->value.enumerated.item[0] = snd_rme96_getinputtype(rme96);
1935 switch (rme96->pci->device) {
1944 if (rme96->rev > 4) {
1962 spin_unlock_irq(&rme96->lock);
1968 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1972 switch (rme96->pci->device) {
1981 if (rme96->rev > 4) {
1994 if (rme96->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST && rme96->rev > 4) {
2000 spin_lock_irq(&rme96->lock);
2001 change = (int)val != snd_rme96_getinputtype(rme96);
2002 snd_rme96_setinputtype(rme96, val);
2003 spin_unlock_irq(&rme96->lock);
2017 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2019 spin_lock_irq(&rme96->lock);
2020 ucontrol->value.enumerated.item[0] = snd_rme96_getclockmode(rme96);
2021 spin_unlock_irq(&rme96->lock);
2027 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2032 spin_lock_irq(&rme96->lock);
2033 change = (int)val != snd_rme96_getclockmode(rme96);
2034 snd_rme96_setclockmode(rme96, val);
2035 spin_unlock_irq(&rme96->lock);
2051 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2053 spin_lock_irq(&rme96->lock);
2054 ucontrol->value.enumerated.item[0] = snd_rme96_getattenuation(rme96);
2055 spin_unlock_irq(&rme96->lock);
2061 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2066 spin_lock_irq(&rme96->lock);
2068 change = (int)val != snd_rme96_getattenuation(rme96);
2069 snd_rme96_setattenuation(rme96, val);
2070 spin_unlock_irq(&rme96->lock);
2084 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2086 spin_lock_irq(&rme96->lock);
2087 ucontrol->value.enumerated.item[0] = snd_rme96_getmontracks(rme96);
2088 spin_unlock_irq(&rme96->lock);
2094 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2099 spin_lock_irq(&rme96->lock);
2100 change = (int)val != snd_rme96_getmontracks(rme96);
2101 snd_rme96_setmontracks(rme96, val);
2102 spin_unlock_irq(&rme96->lock);
2137 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2139 snd_rme96_convert_to_aes(&ucontrol->value.iec958, rme96->wcreg_spdif);
2145 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2150 spin_lock_irq(&rme96->lock);
2151 change = val != rme96->wcreg_spdif;
2152 rme96->wcreg_spdif = val;
2153 spin_unlock_irq(&rme96->lock);
2166 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2168 snd_rme96_convert_to_aes(&ucontrol->value.iec958, rme96->wcreg_spdif_stream);
2174 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2179 spin_lock_irq(&rme96->lock);
2180 change = val != rme96->wcreg_spdif_stream;
2181 rme96->wcreg_spdif_stream = val;
2182 rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP);
2183 rme96->wcreg |= val;
2184 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
2185 spin_unlock_irq(&rme96->lock);
2205 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2210 uinfo->value.integer.max = RME96_185X_MAX_OUT(rme96);
2217 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2219 spin_lock_irq(&rme96->lock);
2220 u->value.integer.value[0] = rme96->vol[0];
2221 u->value.integer.value[1] = rme96->vol[1];
2222 spin_unlock_irq(&rme96->lock);
2230 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2235 if (!RME96_HAS_ANALOG_OUT(rme96))
2237 maxvol = RME96_185X_MAX_OUT(rme96);
2238 spin_lock_irq(&rme96->lock);
2240 if (vol != rme96->vol[0] && vol <= maxvol) {
2241 rme96->vol[0] = vol;
2245 if (vol != rme96->vol[1] && vol <= maxvol) {
2246 rme96->vol[1] = vol;
2250 snd_rme96_apply_dac_volume(rme96);
2251 spin_unlock_irq(&rme96->lock);
2338 struct rme96 *rme96)
2344 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme96_controls[idx], rme96))) < 0)
2347 rme96->spdif_ctl = kctl;
2350 if (RME96_HAS_ANALOG_OUT(rme96)) {
2352 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_rme96_controls[idx], rme96))) < 0)
2368 struct rme96 *rme96 = card->private_data;
2373 rme96->playback_pointer = readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
2375 rme96->capture_pointer = readl(rme96->iobase + RME96_IO_GET_REC_POS)
2379 memcpy_fromio(rme96->playback_suspend_buffer,
2380 rme96->iobase + RME96_IO_PLAY_BUFFER, RME96_BUFFER_SIZE);
2381 memcpy_fromio(rme96->capture_suspend_buffer,
2382 rme96->iobase + RME96_IO_REC_BUFFER, RME96_BUFFER_SIZE);
2385 rme96->areg &= ~RME96_AR_DAC_EN;
2386 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2393 struct rme96 *rme96 = card->private_data;
2396 writel(0, rme96->iobase + RME96_IO_SET_PLAY_POS
2397 + rme96->playback_pointer);
2398 writel(0, rme96->iobase + RME96_IO_SET_REC_POS
2399 + rme96->capture_pointer);
2402 memcpy_toio(rme96->iobase + RME96_IO_PLAY_BUFFER,
2403 rme96->playback_suspend_buffer, RME96_BUFFER_SIZE);
2404 memcpy_toio(rme96->iobase + RME96_IO_REC_BUFFER,
2405 rme96->capture_suspend_buffer, RME96_BUFFER_SIZE);
2408 writel(rme96->areg | RME96_AR_PD2,
2409 rme96->iobase + RME96_IO_ADDITIONAL_REG);
2410 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2413 snd_rme96_reset_dac(rme96);
2414 rme96->areg |= RME96_AR_DAC_EN;
2415 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
2416 if (RME96_HAS_ANALOG_OUT(rme96)) {
2418 snd_rme96_apply_dac_volume(rme96);
2442 struct rme96 *rme96;
2455 sizeof(struct rme96), &card);
2459 rme96 = card->private_data;
2460 rme96->card = card;
2461 rme96->pci = pci;
2462 err = snd_rme96_create(rme96);
2467 rme96->playback_suspend_buffer = vmalloc(RME96_BUFFER_SIZE);
2468 if (!rme96->playback_suspend_buffer) {
2472 rme96->capture_suspend_buffer = vmalloc(RME96_BUFFER_SIZE);
2473 if (!rme96->capture_suspend_buffer) {
2480 switch (rme96->pci->device) {
2491 pci_read_config_byte(rme96->pci, 8, &val);
2500 rme96->port, rme96->irq);