Lines Matching defs:wcreg
185 u32 wcreg; /* cached write control register value */
223 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
408 writel(rme32->wcreg | RME32_WCR_PD,
410 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
417 rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
418 (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
432 return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
501 ds = rme32->wcreg & RME32_WCR_DS_BM;
504 rme32->wcreg &= ~RME32_WCR_DS_BM;
505 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
509 rme32->wcreg &= ~RME32_WCR_DS_BM;
510 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
514 rme32->wcreg &= ~RME32_WCR_DS_BM;
515 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
521 rme32->wcreg |= RME32_WCR_DS_BM;
522 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
528 rme32->wcreg |= RME32_WCR_DS_BM;
529 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
535 rme32->wcreg |= RME32_WCR_DS_BM;
536 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
542 if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
543 (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
548 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
558 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
563 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
568 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
573 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
579 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
585 return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
586 (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
593 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
597 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
601 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
605 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
611 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
617 return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
618 (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
633 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
636 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
645 rme32->wcreg &= ~RME32_WCR_MODE24;
648 rme32->wcreg |= RME32_WCR_MODE24;
653 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
698 if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
699 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
700 rme32->wcreg |= rme32->wcreg_spdif_stream;
701 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
725 rme32->wcreg |= RME32_WCR_AUTOSYNC;
726 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
748 rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
749 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
772 rme32->wcreg |= RME32_WCR_START;
773 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
786 rme32->wcreg &= ~RME32_WCR_START;
787 if (rme32->wcreg & RME32_WCR_SEL)
788 rme32->wcreg |= RME32_WCR_MUTE;
789 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
846 rme32->wcreg &= ~RME32_WCR_ADAT;
847 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
928 rme32->wcreg |= RME32_WCR_ADAT;
929 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
991 spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1025 if (rme32->wcreg & RME32_WCR_SEL)
1026 rme32->wcreg &= ~RME32_WCR_MUTE;
1027 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1408 rme32->wcreg = RME32_WCR_SEL | /* normal playback */
1411 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1453 if (rme32->wcreg & RME32_WCR_MODE24) {
1458 if (rme32->wcreg & RME32_WCR_MONO) {
1492 if (rme32->wcreg & RME32_WCR_SEL) {
1497 if (rme32->wcreg & RME32_WCR_MUTE) {
1505 ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1506 && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1515 if (rme32->wcreg & RME32_WCR_PRO) {
1520 if (rme32->wcreg & RME32_WCR_EMP) {
1546 rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1560 val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1561 change = val != rme32->wcreg;
1566 rme32->wcreg = val;
1776 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1777 rme32->wcreg |= val;
1778 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);