Lines Matching refs:rmh
239 struct pcxhr_rmh rmh;
267 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
268 rmh.cmd[0] |= IO_NUM_REG_GENCLK;
269 rmh.cmd[1] = pllreg & MASK_DSP_WORD;
270 rmh.cmd[2] = pllreg >> 24;
271 rmh.cmd_len = 3;
272 err = pcxhr_send_msg(mgr, &rmh);
313 struct pcxhr_rmh rmh;
328 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */
329 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
331 rmh.cmd[1] = 1;
332 rmh.cmd_len = 2;
334 err = pcxhr_send_msg(mgr, &rmh);
338 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */
339 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
340 rmh.cmd[1] = speed;
341 rmh.cmd_len = 2;
342 err = pcxhr_send_msg(mgr, &rmh);
358 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */
359 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
361 rmh.cmd[1] = 1;
362 rmh.cmd_len = 2;
364 err = pcxhr_send_msg(mgr, &rmh);
382 struct pcxhr_rmh rmh;
397 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
398 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */
400 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
402 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2;
403 rmh.cmd[2] = rate;
404 rmh.cmd_len = 3;
405 err = pcxhr_send_msg(mgr, &rmh);
417 struct pcxhr_rmh rmh;
443 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
444 rmh.cmd_len = 2;
445 rmh.cmd[0] |= IO_NUM_REG_STATUS;
447 rmh.cmd[1] = reg;
448 err = pcxhr_send_msg(mgr, &rmh);
454 rmh.cmd[1] = REG_STATUS_CURRENT;
455 err = pcxhr_send_msg(mgr, &rmh);
458 switch (rmh.stat[1] & 0x0f) {
495 struct pcxhr_rmh rmh;
519 pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
520 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
525 err = pcxhr_send_msg(chip->mgr, &rmh);
547 struct pcxhr_rmh rmh;
591 pcxhr_init_rmh(&rmh, is_capture ?
593 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
599 rmh.cmd[0] |= 1<<10;
601 rmh.cmd[0] |= 1<<12;
603 rmh.cmd[1] = 0;
604 rmh.cmd_len = 2;
607 rmh.cmd[1] = stream->channels;
610 rmh.cmd[2] = (stream->channels == 1) ? 0x01 : 0x03;
611 rmh.cmd_len = 3;
614 rmh.cmd[rmh.cmd_len++] = header >> 8;
615 rmh.cmd[rmh.cmd_len++] = (header & 0xff) << 16;
616 err = pcxhr_send_msg(chip->mgr, &rmh);
626 struct pcxhr_rmh rmh;
639 pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
640 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
646 rmh.cmd[1] = subs->runtime->dma_bytes * 8;
648 rmh.cmd[2] = subs->runtime->dma_addr >> 24;
650 rmh.cmd[2] |= 1<<19;
652 rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;
653 rmh.cmd_len = 4;
654 err = pcxhr_send_msg(chip->mgr, &rmh);
666 struct pcxhr_rmh rmh;
669 pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT);
670 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,
672 err = pcxhr_send_msg(chip->mgr, &rmh);
674 *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24;
675 *sample_count += (snd_pcm_uframes_t)rmh.stat[1];
882 struct pcxhr_rmh rmh;
885 pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
889 rmh.cmd[0] |= mgr->granularity;
891 err = pcxhr_send_msg(mgr, &rmh);
1227 struct pcxhr_rmh rmh;
1241 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES);
1242 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1243 int cur = rmh.stat[0];
1244 int ref = rmh.stat[1];
1257 rmh.stat[2], rmh.stat[3]);
1271 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS;
1272 rmh.cmd_len = 1;
1273 rmh.stat_len = PCXHR_SIZE_MAX_STATUS;
1274 rmh.dsp_stat = 0;
1275 rmh.cmd_idx = CMD_LAST_INDEX;
1276 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1278 if (rmh.stat_len > 8)
1279 rmh.stat_len = 8;
1280 for (i = 0; i < rmh.stat_len; i++)
1282 i, rmh.stat[i]);
1380 struct pcxhr_rmh rmh;
1389 pcxhr_init_rmh(&rmh, CMD_MANAGE_SIGNAL);
1390 rmh.cmd[0] |= MANAGE_SIGNAL_TIME_CODE;
1391 err = pcxhr_send_msg(mgr, &rmh);
1403 pcxhr_init_rmh(&rmh, CMD_GET_TIME_CODE);
1404 err = pcxhr_send_msg(mgr, &rmh);
1409 ltcHrs = 10*((rmh.stat[0] >> 8) & 0x3) + (rmh.stat[0] & 0xf);
1410 ltcMin = 10*((rmh.stat[1] >> 16) & 0x7) + ((rmh.stat[1] >> 8) & 0xf);
1411 ltcSec = 10*(rmh.stat[1] & 0x7) + ((rmh.stat[2] >> 16) & 0xf);
1412 ltcFrm = 10*((rmh.stat[2] >> 8) & 0x3) + (rmh.stat[2] & 0xf);
1416 snd_iprintf(buffer, "raw: 0x%04x%06x%06x\n", rmh.stat[0] & 0x00ffff,
1417 rmh.stat[1] & 0xffffff, rmh.stat[2] & 0xffffff);
1419 rmh.stat[3] & 0xffffff, rmh.stat[4] & 0xffffff);*/
1420 if (!(rmh.stat[0] & TIME_CODE_VALID_MASK)) {