Lines Matching refs:chip
29 static inline int oxygen_uart_input_ready(struct oxygen *chip)
31 return !(oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_RX_EMPTY);
34 static void oxygen_read_uart(struct oxygen *chip)
36 if (unlikely(!oxygen_uart_input_ready(chip))) {
38 oxygen_read8(chip, OXYGEN_MPU401);
42 u8 data = oxygen_read8(chip, OXYGEN_MPU401);
45 if (chip->uart_input_count >= ARRAY_SIZE(chip->uart_input))
46 chip->uart_input_count = 0;
47 chip->uart_input[chip->uart_input_count++] = data;
48 } while (oxygen_uart_input_ready(chip));
49 if (chip->model.uart_input)
50 chip->model.uart_input(chip);
55 struct oxygen *chip = dev_id;
58 status = oxygen_read16(chip, OXYGEN_INTERRUPT_STATUS);
62 spin_lock(&chip->reg_lock);
75 chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
76 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
77 chip->interrupt_mask & ~clear);
78 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
79 chip->interrupt_mask);
82 elapsed_streams = status & chip->pcm_running;
84 spin_unlock(&chip->reg_lock);
87 if ((elapsed_streams & (1 << i)) && chip->streams[i])
88 snd_pcm_period_elapsed(chip->streams[i]);
91 spin_lock(&chip->reg_lock);
92 i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
96 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
97 schedule_work(&chip->spdif_input_bits_work);
99 spin_unlock(&chip->reg_lock);
103 schedule_work(&chip->gpio_work);
106 if (chip->midi)
107 snd_mpu401_uart_interrupt(0, chip->midi->private_data);
109 oxygen_read_uart(chip);
113 wake_up(&chip->ac97_waitqueue);
120 struct oxygen *chip = container_of(work, struct oxygen,
130 spin_lock_irq(&chip->reg_lock);
131 reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
140 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
141 spin_unlock_irq(&chip->reg_lock);
143 spin_lock_irq(&chip->reg_lock);
144 reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
157 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
161 spin_unlock_irq(&chip->reg_lock);
163 if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
164 spin_lock_irq(&chip->reg_lock);
165 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
166 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
167 chip->interrupt_mask);
168 spin_unlock_irq(&chip->reg_lock);
174 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
175 &chip->controls[CONTROL_SPDIF_INPUT_BITS]->id);
181 struct oxygen *chip = container_of(work, struct oxygen, gpio_work);
183 if (chip->model.gpio_changed)
184 chip->model.gpio_changed(chip);
190 struct oxygen *chip = entry->private_data;
193 switch (oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_PACKAGE_ID_MASK) {
203 snd_iprintf(buffer, " %02x", oxygen_read8(chip, i + j));
206 if (mutex_lock_interruptible(&chip->mutex) < 0)
208 if (chip->has_ac97_0) {
214 oxygen_read_ac97(chip, 0, i + j));
218 if (chip->has_ac97_1) {
224 oxygen_read_ac97(chip, 1, i + j));
228 mutex_unlock(&chip->mutex);
229 if (chip->model.dump_registers)
230 chip->model.dump_registers(chip, buffer);
233 static void oxygen_proc_init(struct oxygen *chip)
235 snd_card_ro_proc_new(chip->card, "oxygen", chip, oxygen_proc_read);
239 oxygen_search_pci_id(struct oxygen *chip, const struct pci_device_id ids[])
247 oxygen_clear_bits8(chip, OXYGEN_FUNCTION,
251 * chip didn't if the first EEPROM word was overwritten.
253 subdevice = oxygen_read_eeprom(chip, 2);
255 if (subdevice == 0xffff && oxygen_read_eeprom(chip, 1) == 0xffff)
269 static void oxygen_restore_eeprom(struct oxygen *chip,
274 eeprom_id = oxygen_read_eeprom(chip, 0);
285 oxygen_write_eeprom(chip, 1, id->subvendor);
286 oxygen_write_eeprom(chip, 0, OXYGEN_EEPROM_ID);
288 oxygen_set_bits8(chip, OXYGEN_MISC,
290 pci_write_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID,
292 pci_write_config_word(chip->pci, PCI_SUBSYSTEM_ID,
294 oxygen_clear_bits8(chip, OXYGEN_MISC,
297 dev_info(chip->card->dev, "EEPROM ID restored\n");
339 tmp |= 1; /* park the PCI arbiter to the sound chip */
353 static void oxygen_init(struct oxygen *chip)
357 chip->dac_routing = 1;
359 chip->dac_volume[i] = chip->model.dac_volume_min;
360 chip->dac_mute = 1;
361 chip->spdif_playback_enable = 0;
362 chip->spdif_bits = OXYGEN_SPDIF_C | OXYGEN_SPDIF_ORIGINAL |
364 chip->spdif_pcm_bits = chip->spdif_bits;
366 if (!(oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_REVISION_2))
367 oxygen_set_bits8(chip, OXYGEN_MISC,
370 i = oxygen_read16(chip, OXYGEN_AC97_CONTROL);
371 chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0;
372 chip->has_ac97_1 = (i & OXYGEN_AC97_CODEC_1) != 0;
374 oxygen_write8_masked(chip, OXYGEN_FUNCTION,
376 chip->model.function_flags,
380 oxygen_write8(chip, OXYGEN_DMA_STATUS, 0);
381 oxygen_write8(chip, OXYGEN_DMA_PAUSE, 0);
382 oxygen_write8(chip, OXYGEN_PLAY_CHANNELS,
386 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
387 oxygen_write8_masked(chip, OXYGEN_MISC,
388 chip->model.misc_flags,
394 oxygen_write8(chip, OXYGEN_REC_FORMAT,
398 oxygen_write8(chip, OXYGEN_PLAY_FORMAT,
401 oxygen_write8(chip, OXYGEN_REC_CHANNELS, OXYGEN_REC_CHANNELS_2_2_2);
402 oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT,
404 chip->model.dac_i2s_format |
405 OXYGEN_I2S_MCLK(chip->model.dac_mclks) |
409 if (chip->model.device_config & CAPTURE_0_FROM_I2S_1)
410 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
412 chip->model.adc_i2s_format |
413 OXYGEN_I2S_MCLK(chip->model.adc_mclks) |
418 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
421 if (chip->model.device_config & (CAPTURE_0_FROM_I2S_2 |
423 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT,
425 chip->model.adc_i2s_format |
426 OXYGEN_I2S_MCLK(chip->model.adc_mclks) |
431 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT,
434 if (chip->model.device_config & CAPTURE_3_FROM_I2S_3)
435 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT,
437 chip->model.adc_i2s_format |
438 OXYGEN_I2S_MCLK(chip->model.adc_mclks) |
443 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT,
446 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
449 if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
450 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
463 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
467 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits);
468 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
472 oxygen_clear_bits8(chip, OXYGEN_MPU401_CONTROL, OXYGEN_MPU401_LOOPBACK);
473 oxygen_write8(chip, OXYGEN_GPI_INTERRUPT_MASK, 0);
474 oxygen_write16(chip, OXYGEN_GPIO_INTERRUPT_MASK, 0);
475 oxygen_write16(chip, OXYGEN_PLAY_ROUTING,
482 oxygen_write8(chip, OXYGEN_REC_ROUTING,
486 oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0);
487 oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING,
493 if (chip->has_ac97_0 | chip->has_ac97_1)
494 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK,
498 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0);
499 oxygen_write32(chip, OXYGEN_AC97_OUT_CONFIG, 0);
500 oxygen_write32(chip, OXYGEN_AC97_IN_CONFIG, 0);
501 if (!(chip->has_ac97_0 | chip->has_ac97_1))
502 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
504 if (!chip->has_ac97_0) {
505 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
508 oxygen_write_ac97(chip, 0, AC97_RESET, 0);
510 oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP,
512 oxygen_ac97_set_bits(chip, 0, CM9780_MIXER,
515 oxygen_ac97_set_bits(chip, 0, CM9780_JACK,
519 oxygen_write_ac97(chip, 0, AC97_MASTER, 0x0000);
520 oxygen_write_ac97(chip, 0, AC97_PC_BEEP, 0x8000);
521 oxygen_write_ac97(chip, 0, AC97_MIC, 0x8808);
522 oxygen_write_ac97(chip, 0, AC97_LINE, 0x0808);
523 oxygen_write_ac97(chip, 0, AC97_CD, 0x8808);
524 oxygen_write_ac97(chip, 0, AC97_VIDEO, 0x8808);
525 oxygen_write_ac97(chip, 0, AC97_AUX, 0x8808);
526 oxygen_write_ac97(chip, 0, AC97_REC_GAIN, 0x8000);
527 oxygen_write_ac97(chip, 0, AC97_CENTER_LFE_MASTER, 0x8080);
528 oxygen_write_ac97(chip, 0, AC97_SURROUND_MASTER, 0x8080);
529 oxygen_ac97_clear_bits(chip, 0, CM9780_GPIO_STATUS,
532 oxygen_ac97_set_bits(chip, 0, AC97_POWERDOWN,
534 oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS,
537 if (chip->has_ac97_1) {
538 oxygen_set_bits32(chip, OXYGEN_AC97_OUT_CONFIG,
541 oxygen_write_ac97(chip, 1, AC97_RESET, 0);
543 oxygen_write_ac97(chip, 1, AC97_MASTER, 0x0000);
544 oxygen_write_ac97(chip, 1, AC97_HEADPHONE, 0x8000);
545 oxygen_write_ac97(chip, 1, AC97_PC_BEEP, 0x8000);
546 oxygen_write_ac97(chip, 1, AC97_MIC, 0x8808);
547 oxygen_write_ac97(chip, 1, AC97_LINE, 0x8808);
548 oxygen_write_ac97(chip, 1, AC97_CD, 0x8808);
549 oxygen_write_ac97(chip, 1, AC97_VIDEO, 0x8808);
550 oxygen_write_ac97(chip, 1, AC97_AUX, 0x8808);
551 oxygen_write_ac97(chip, 1, AC97_PCM, 0x0808);
552 oxygen_write_ac97(chip, 1, AC97_REC_SEL, 0x0000);
553 oxygen_write_ac97(chip, 1, AC97_REC_GAIN, 0x0000);
554 oxygen_ac97_set_bits(chip, 1, 0x6a, 0x0040);
558 static void oxygen_shutdown(struct oxygen *chip)
560 spin_lock_irq(&chip->reg_lock);
561 chip->interrupt_mask = 0;
562 chip->pcm_running = 0;
563 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
564 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
565 spin_unlock_irq(&chip->reg_lock);
570 struct oxygen *chip = card->private_data;
572 oxygen_shutdown(chip);
573 if (chip->irq >= 0)
574 free_irq(chip->irq, chip);
575 flush_work(&chip->spdif_input_bits_work);
576 flush_work(&chip->gpio_work);
577 chip->model.cleanup(chip);
578 kfree(chip->model_data);
579 mutex_destroy(&chip->mutex);
580 pci_release_regions(chip->pci);
581 pci_disable_device(chip->pci);
587 int (*get_model)(struct oxygen *chip,
593 struct oxygen *chip;
598 sizeof(*chip), &card);
602 chip = card->private_data;
603 chip->card = card;
604 chip->pci = pci;
605 chip->irq = -1;
606 spin_lock_init(&chip->reg_lock);
607 mutex_init(&chip->mutex);
608 INIT_WORK(&chip->spdif_input_bits_work,
610 INIT_WORK(&chip->gpio_work, oxygen_gpio_changed);
611 init_waitqueue_head(&chip->ac97_waitqueue);
629 chip->addr = pci_resource_start(pci, 0);
631 pci_id = oxygen_search_pci_id(chip, ids);
636 oxygen_restore_eeprom(chip, pci_id);
637 err = get_model(chip, pci_id);
641 if (chip->model.model_data_size) {
642 chip->model_data = kzalloc(chip->model.model_data_size,
644 if (!chip->model_data) {
654 oxygen_init(chip);
655 chip->model.init(chip);
658 KBUILD_MODNAME, chip);
663 chip->irq = pci->irq;
664 card->sync_irq = chip->irq;
666 strcpy(card->driver, chip->model.chip);
667 strcpy(card->shortname, chip->model.shortname);
669 chip->model.longname, chip->addr, chip->irq);
670 strcpy(card->mixername, chip->model.chip);
671 snd_component_add(card, chip->model.chip);
673 err = oxygen_pcm_init(chip);
677 err = oxygen_mixer_init(chip);
681 if (chip->model.device_config & (MIDI_OUTPUT | MIDI_INPUT)) {
684 if (chip->model.device_config & MIDI_OUTPUT)
686 if (chip->model.device_config & MIDI_INPUT)
689 chip->addr + OXYGEN_MPU401,
690 info_flags, -1, &chip->midi);
695 oxygen_proc_init(chip);
697 spin_lock_irq(&chip->reg_lock);
698 if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
699 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
700 if (chip->has_ac97_0 | chip->has_ac97_1)
701 chip->interrupt_mask |= OXYGEN_INT_AC97;
702 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
703 spin_unlock_irq(&chip->reg_lock);
732 struct oxygen *chip = card->private_data;
737 if (chip->model.suspend)
738 chip->model.suspend(chip);
740 spin_lock_irq(&chip->reg_lock);
741 saved_interrupt_mask = chip->interrupt_mask;
742 chip->interrupt_mask = 0;
743 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
744 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
745 spin_unlock_irq(&chip->reg_lock);
747 flush_work(&chip->spdif_input_bits_work);
748 flush_work(&chip->gpio_work);
749 chip->interrupt_mask = saved_interrupt_mask;
767 static void oxygen_restore_ac97(struct oxygen *chip, unsigned int codec)
771 oxygen_write_ac97(chip, codec, AC97_RESET, 0);
775 oxygen_write_ac97(chip, codec, i * 2,
776 chip->saved_ac97_registers[codec][i]);
782 struct oxygen *chip = card->private_data;
785 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
786 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
789 oxygen_write8(chip, i, chip->saved_registers._8[i]);
790 if (chip->has_ac97_0)
791 oxygen_restore_ac97(chip, 0);
792 if (chip->has_ac97_1)
793 oxygen_restore_ac97(chip, 1);
795 if (chip->model.resume)
796 chip->model.resume(chip);
798 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
811 struct oxygen *chip = card->private_data;
813 oxygen_shutdown(chip);
814 chip->model.cleanup(chip);