Lines Matching defs:iobase
728 unsigned long iobase;
917 outw(value, chip->iobase + reg);
922 return inw(chip->iobase + reg);
927 outb(value, chip->iobase + reg);
932 return inb(chip->iobase + reg);
1532 x = inb(chip->iobase + SHADOW_MIX_REG_VOICE) & 0xee;
1543 outb(0x88, chip->iobase + SHADOW_MIX_REG_VOICE);
1544 outb(0x88, chip->iobase + HW_VOL_COUNTER_VOICE);
1545 outb(0x88, chip->iobase + SHADOW_MIX_REG_MASTER);
1546 outb(0x88, chip->iobase + HW_VOL_COUNTER_MASTER);
1620 status = inb(chip->iobase + HOST_INT_STATUS);
1633 u8 ctl = inb(chip->iobase + ASSP_CONTROL_B);
1635 ctl = inb(chip->iobase + ASSP_HOST_INT_STATUS);
1637 outb(DSP2HOST_REQ_TIMER, chip->iobase + ASSP_HOST_INT_STATUS);
1656 outb(status, chip->iobase + HOST_INT_STATUS);
1926 int io = chip->iobase;
1967 int io = chip->iobase;
2222 int io = chip->iobase;
2246 unsigned long io = chip->iobase;
2270 unsigned long io = chip->iobase;
2289 outb(RESET_ASSP, chip->iobase + ASSP_CONTROL_B);
2305 t = inb(chip->iobase + ASSP_CONTROL_A);
2309 outb(t, chip->iobase + ASSP_CONTROL_A);
2312 outb(RUN_ASSP, chip->iobase + ASSP_CONTROL_B);
2326 unsigned long io = chip->iobase;
2333 outb(val, chip->iobase + HOST_INT_STATUS);
2365 if (chip->iobase) {
2366 outw(0, chip->iobase + HOST_INT_CTRL); /* disable ints */
2376 if (chip->iobase)
2615 chip->iobase = pci_resource_start(pci, 0);
2733 card->shortname, chip->iobase, chip->irq);
2742 chip->iobase + MPU401_DATA_PORT,