Lines Matching refs:chip
74 static int corb_send_verb(struct lola *chip, unsigned int nid,
81 chip->last_cmd_nid = nid;
82 chip->last_verb = verb;
83 chip->last_data = data;
84 chip->last_extdata = extdata;
87 spin_lock_irqsave(&chip->reg_lock, flags);
88 if (chip->rirb.cmds < LOLA_CORB_ENTRIES - 1) {
89 unsigned int wp = chip->corb.wp + 1;
91 chip->corb.wp = wp;
92 chip->corb.buf[wp * 2] = cpu_to_le32(data);
93 chip->corb.buf[wp * 2 + 1] = cpu_to_le32(extdata);
94 lola_writew(chip, BAR0, CORBWP, wp);
95 chip->rirb.cmds++;
99 spin_unlock_irqrestore(&chip->reg_lock, flags);
103 static void lola_queue_unsol_event(struct lola *chip, unsigned int res,
106 lola_update_ext_clock_freq(chip, res);
110 static void lola_update_rirb(struct lola *chip)
115 wp = lola_readw(chip, BAR0, RIRBWP);
116 if (wp == chip->rirb.wp)
118 chip->rirb.wp = wp;
120 while (chip->rirb.rp != wp) {
121 chip->rirb.rp++;
122 chip->rirb.rp %= LOLA_CORB_ENTRIES;
124 rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */
125 res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]);
126 res = le32_to_cpu(chip->rirb.buf[rp]);
128 lola_queue_unsol_event(chip, res, res_ex);
129 else if (chip->rirb.cmds) {
130 chip->res = res;
131 chip->res_ex = res_ex;
133 chip->rirb.cmds--;
138 static int rirb_get_response(struct lola *chip, unsigned int *val,
146 if (chip->polling_mode) {
147 spin_lock_irq(&chip->reg_lock);
148 lola_update_rirb(chip);
149 spin_unlock_irq(&chip->reg_lock);
151 if (!chip->rirb.cmds) {
152 *val = chip->res;
154 *extval = chip->res_ex;
156 chip->res, chip->res_ex);
157 if (chip->res_ex & LOLA_RIRB_EX_ERROR) {
158 dev_warn(chip->card->dev, "RIRB ERROR: "
160 chip->last_cmd_nid,
161 chip->last_verb, chip->last_data,
162 chip->last_extdata);
172 dev_warn(chip->card->dev, "RIRB response error\n");
173 if (!chip->polling_mode) {
174 dev_warn(chip->card->dev, "switching to polling mode\n");
175 chip->polling_mode = 1;
182 int lola_codec_write(struct lola *chip, unsigned int nid, unsigned int verb,
187 return corb_send_verb(chip, nid, verb, data, extdata);
191 int lola_codec_read(struct lola *chip, unsigned int nid, unsigned int verb,
199 err = corb_send_verb(chip, nid, verb, data, extdata);
202 err = rirb_get_response(chip, val, extval);
207 int lola_codec_flush(struct lola *chip)
210 return rirb_get_response(chip, &tmp, NULL);
218 struct lola *chip = dev_id;
224 spin_lock(&chip->reg_lock);
229 status = lola_readl(chip, BAR1, DINTSTS);
233 in_sts = lola_readl(chip, BAR1, DIINTSTS);
234 out_sts = lola_readl(chip, BAR1, DOINTSTS);
237 for (i = 0; in_sts && i < chip->pcm[CAPT].num_streams; i++) {
241 reg = lola_dsd_read(chip, i, STS);
247 lola_dsd_write(chip, i, STS, reg);
251 for (i = 0; out_sts && i < chip->pcm[PLAY].num_streams; i++) {
255 reg = lola_dsd_read(chip, i + MAX_STREAM_IN_COUNT, STS);
260 lola_dsd_write(chip, i + MAX_STREAM_IN_COUNT, STS, reg);
265 rbsts = lola_readb(chip, BAR0, RIRBSTS);
268 lola_writeb(chip, BAR0, RIRBSTS, rbsts);
269 rbsts = lola_readb(chip, BAR0, CORBSTS);
272 lola_writeb(chip, BAR0, CORBSTS, rbsts);
274 lola_update_rirb(chip);
279 lola_writel(chip, BAR1, DINTSTS,
284 spin_unlock(&chip->reg_lock);
286 lola_pcm_update(chip, &chip->pcm[CAPT], notify_ins);
287 lola_pcm_update(chip, &chip->pcm[PLAY], notify_outs);
296 static int reset_controller(struct lola *chip)
298 unsigned int gctl = lola_readl(chip, BAR0, GCTL);
303 lola_writel(chip, BAR1, BOARD_MODE, 0);
307 chip->cold_reset = 1;
308 lola_writel(chip, BAR0, GCTL, LOLA_GCTL_RESET);
312 gctl = lola_readl(chip, BAR0, GCTL);
317 dev_err(chip->card->dev, "cannot reset controller\n");
323 static void lola_irq_enable(struct lola *chip)
328 val = (1 << chip->pcm[PLAY].num_streams) - 1;
329 lola_writel(chip, BAR1, DOINTCTL, val);
330 val = (1 << chip->pcm[CAPT].num_streams) - 1;
331 lola_writel(chip, BAR1, DIINTCTL, val);
336 lola_writel(chip, BAR1, DINTCTL, val);
339 static void lola_irq_disable(struct lola *chip)
341 lola_writel(chip, BAR1, DINTCTL, 0);
342 lola_writel(chip, BAR1, DIINTCTL, 0);
343 lola_writel(chip, BAR1, DOINTCTL, 0);
346 static int setup_corb_rirb(struct lola *chip)
353 &chip->pci->dev,
354 PAGE_SIZE, &chip->rb);
358 chip->corb.addr = chip->rb.addr;
359 chip->corb.buf = (__le32 *)chip->rb.area;
360 chip->rirb.addr = chip->rb.addr + 2048;
361 chip->rirb.buf = (__le32 *)(chip->rb.area + 2048);
364 lola_writeb(chip, BAR0, RIRBCTL, 0);
365 lola_writeb(chip, BAR0, CORBCTL, 0);
369 if (!lola_readb(chip, BAR0, RIRBCTL) &&
370 !lola_readb(chip, BAR0, CORBCTL))
376 lola_writel(chip, BAR0, CORBLBASE, (u32)chip->corb.addr);
377 lola_writel(chip, BAR0, CORBUBASE, upper_32_bits(chip->corb.addr));
379 lola_writeb(chip, BAR0, CORBSIZE, 0x02);
381 lola_writew(chip, BAR0, CORBWP, 0);
383 lola_writew(chip, BAR0, CORBRP, LOLA_RBRWP_CLR);
385 lola_writeb(chip, BAR0, CORBCTL, LOLA_RBCTL_DMA_EN);
387 tmp = lola_readb(chip, BAR0, CORBSTS) & LOLA_CORB_INT_MASK;
389 lola_writeb(chip, BAR0, CORBSTS, tmp);
390 chip->corb.wp = 0;
393 lola_writel(chip, BAR0, RIRBLBASE, (u32)chip->rirb.addr);
394 lola_writel(chip, BAR0, RIRBUBASE, upper_32_bits(chip->rirb.addr));
396 lola_writeb(chip, BAR0, RIRBSIZE, 0x02);
398 lola_writew(chip, BAR0, RIRBWP, LOLA_RBRWP_CLR);
400 lola_writew(chip, BAR0, RINTCNT, 1);
402 lola_writeb(chip, BAR0, RIRBCTL, LOLA_RBCTL_DMA_EN | LOLA_RBCTL_IRQ_EN);
404 tmp = lola_readb(chip, BAR0, RIRBSTS) & LOLA_RIRB_INT_MASK;
406 lola_writeb(chip, BAR0, RIRBSTS, tmp);
407 chip->rirb.rp = chip->rirb.cmds = 0;
412 static void stop_corb_rirb(struct lola *chip)
415 lola_writeb(chip, BAR0, RIRBCTL, 0);
416 lola_writeb(chip, BAR0, CORBCTL, 0);
419 static void lola_reset_setups(struct lola *chip)
422 lola_set_granularity(chip, chip->granularity, true);
424 lola_set_clock_index(chip, chip->clock.cur_index);
426 lola_enable_clock_events(chip);
428 lola_setup_all_analog_gains(chip, CAPT, false); /* input, update */
430 lola_set_src_config(chip, chip->input_src_mask, false);
432 lola_setup_all_analog_gains(chip, PLAY, false); /* output, update */
435 static int lola_parse_tree(struct lola *chip)
440 err = lola_read_param(chip, 0, LOLA_PAR_VENDOR_ID, &val);
442 dev_err(chip->card->dev, "Can't read VENDOR_ID\n");
447 dev_err(chip->card->dev, "Unknown codec vendor 0x%x\n", val);
451 err = lola_read_param(chip, 1, LOLA_PAR_FUNCTION_TYPE, &val);
453 dev_err(chip->card->dev, "Can't read FUNCTION_TYPE\n");
457 dev_err(chip->card->dev, "Unknown function type %d\n", val);
461 err = lola_read_param(chip, 1, LOLA_PAR_SPECIFIC_CAPS, &val);
463 dev_err(chip->card->dev, "Can't read SPECCAPS\n");
466 chip->lola_caps = val;
467 chip->pin[CAPT].num_pins = LOLA_AFG_INPUT_PIN_COUNT(chip->lola_caps);
468 chip->pin[PLAY].num_pins = LOLA_AFG_OUTPUT_PIN_COUNT(chip->lola_caps);
469 dev_dbg(chip->card->dev, "speccaps=0x%x, pins in=%d, out=%d\n",
470 chip->lola_caps,
471 chip->pin[CAPT].num_pins, chip->pin[PLAY].num_pins);
473 if (chip->pin[CAPT].num_pins > MAX_AUDIO_INOUT_COUNT ||
474 chip->pin[PLAY].num_pins > MAX_AUDIO_INOUT_COUNT) {
475 dev_err(chip->card->dev, "Invalid Lola-spec caps 0x%x\n", val);
480 err = lola_init_pcm(chip, CAPT, &nid);
483 err = lola_init_pcm(chip, PLAY, &nid);
487 err = lola_init_pins(chip, CAPT, &nid);
490 err = lola_init_pins(chip, PLAY, &nid);
494 if (LOLA_AFG_CLOCK_WIDGET_PRESENT(chip->lola_caps)) {
495 err = lola_init_clock_widget(chip, nid);
500 if (LOLA_AFG_MIXER_WIDGET_PRESENT(chip->lola_caps)) {
501 err = lola_init_mixer_widget(chip, nid);
508 err = lola_enable_clock_events(chip);
515 if (!chip->cold_reset) {
516 lola_reset_setups(chip);
517 chip->cold_reset = 1;
520 if (chip->granularity != LOLA_GRANULARITY_MIN)
521 lola_set_granularity(chip, chip->granularity, true);
527 static void lola_stop_hw(struct lola *chip)
529 stop_corb_rirb(chip);
530 lola_irq_disable(chip);
533 static void lola_free(struct lola *chip)
535 if (chip->initialized)
536 lola_stop_hw(chip);
537 lola_free_pcm(chip);
538 lola_free_mixer(chip);
539 if (chip->irq >= 0)
540 free_irq(chip->irq, (void *)chip);
541 iounmap(chip->bar[0].remap_addr);
542 iounmap(chip->bar[1].remap_addr);
543 if (chip->rb.area)
544 snd_dma_free_pages(&chip->rb);
545 pci_release_regions(chip->pci);
546 pci_disable_device(chip->pci);
547 kfree(chip);
559 struct lola *chip;
572 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
573 if (!chip) {
578 spin_lock_init(&chip->reg_lock);
579 mutex_init(&chip->open_mutex);
580 chip->card = card;
581 chip->pci = pci;
582 chip->irq = -1;
584 chip->granularity = granularity[dev];
585 switch (chip->granularity) {
587 chip->sample_rate_max = 48000;
590 chip->sample_rate_max = 96000;
593 chip->sample_rate_max = 192000;
596 dev_warn(chip->card->dev,
598 chip->granularity, LOLA_GRANULARITY_MAX);
599 chip->granularity = LOLA_GRANULARITY_MAX;
600 chip->sample_rate_max = 192000;
603 chip->sample_rate_min = sample_rate_min[dev];
604 if (chip->sample_rate_min > chip->sample_rate_max) {
605 dev_warn(chip->card->dev,
607 chip->sample_rate_min);
608 chip->sample_rate_min = 16000;
613 kfree(chip);
618 chip->bar[0].addr = pci_resource_start(pci, 0);
619 chip->bar[0].remap_addr = pci_ioremap_bar(pci, 0);
620 chip->bar[1].addr = pci_resource_start(pci, 2);
621 chip->bar[1].remap_addr = pci_ioremap_bar(pci, 2);
622 if (!chip->bar[0].remap_addr || !chip->bar[1].remap_addr) {
623 dev_err(chip->card->dev, "ioremap error\n");
630 err = reset_controller(chip);
635 KBUILD_MODNAME, chip)) {
636 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
640 chip->irq = pci->irq;
641 card->sync_irq = chip->irq;
643 dever = lola_readl(chip, BAR1, DEVER);
644 chip->pcm[CAPT].num_streams = (dever >> 0) & 0x3ff;
645 chip->pcm[PLAY].num_streams = (dever >> 10) & 0x3ff;
646 chip->version = (dever >> 24) & 0xff;
647 dev_dbg(chip->card->dev, "streams in=%d, out=%d, version=0x%x\n",
648 chip->pcm[CAPT].num_streams, chip->pcm[PLAY].num_streams,
649 chip->version);
652 if (chip->pcm[CAPT].num_streams > MAX_STREAM_IN_COUNT ||
653 chip->pcm[PLAY].num_streams > MAX_STREAM_OUT_COUNT ||
654 (!chip->pcm[CAPT].num_streams &&
655 !chip->pcm[PLAY].num_streams)) {
656 dev_err(chip->card->dev, "invalid DEVER = %x\n", dever);
661 err = setup_corb_rirb(chip);
665 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
667 dev_err(chip->card->dev, "Error creating device [card]!\n");
675 card->shortname, chip->bar[0].addr, chip->irq);
678 lola_irq_enable(chip);
680 chip->initialized = 1;
681 *rchip = chip;
685 lola_free(chip);
694 struct lola *chip;
711 err = lola_create(card, pci, dev, &chip);
714 card->private_data = chip;
716 err = lola_parse_tree(chip);
720 err = lola_create_pcm(chip);
724 err = lola_create_mixer(chip);
728 lola_proc_debug_new(chip);