Lines Matching refs:spec
106 struct psc724_spec *spec = container_of(wm, struct psc724_spec, wm8766);
107 struct snd_ice1712 *ice = spec->ice;
148 struct psc724_spec *spec = container_of(wm, struct psc724_spec, wm8776);
150 snd_vt1724_write_i2c(spec->ice, 0x34, addr, data);
158 struct psc724_spec *spec = ice->spec;
160 spec->mute_all = !on;
170 struct psc724_spec *spec = ice->spec;
172 return !spec->mute_all;
179 struct psc724_spec *spec = ice->spec;
182 u16 power = spec->wm8776.regs[WM8776_REG_PWRDOWN] & ~WM8776_PWR_HPPD;
187 snd_wm8776_set_power(&spec->wm8776, power);
188 spec->hp_connected = hp_connected;
197 strlcpy(elem_id.name, spec->wm8776.ctl[WM8776_CTL_HP_SW].name,
205 struct psc724_spec *spec = container_of(work, struct psc724_spec,
207 struct snd_ice1712 *ice = spec->ice;
210 schedule_delayed_work(&spec->hp_work, msecs_to_jiffies(JACK_INTERVAL));
211 if (hp_connected == spec->hp_connected)
218 struct psc724_spec *spec = ice->spec;
220 if (spec->jack_detect == on)
223 spec->jack_detect = on;
227 schedule_delayed_work(&spec->hp_work,
230 cancel_delayed_work_sync(&spec->hp_work);
235 struct psc724_spec *spec = ice->spec;
237 return spec->jack_detect;
310 struct psc724_spec *spec = ice->spec;
312 spec->wm8776.ctl[WM8776_CTL_DAC_VOL].name = front_volume;
313 spec->wm8776.ctl[WM8776_CTL_DAC_SW].name = front_switch;
314 spec->wm8776.ctl[WM8776_CTL_DAC_ZC_SW].name = front_zc;
315 spec->wm8776.ctl[WM8776_CTL_AUX_SW].name = NULL;
316 spec->wm8776.ctl[WM8776_CTL_DAC_IZD_SW].name = front_izd;
317 spec->wm8776.ctl[WM8776_CTL_PHASE_SW].name = front_phase;
318 spec->wm8776.ctl[WM8776_CTL_DEEMPH_SW].name = front_deemph;
319 spec->wm8776.ctl[WM8776_CTL_INPUT1_SW].name = ain1_switch;
320 spec->wm8776.ctl[WM8776_CTL_INPUT2_SW].name = ain2_switch;
321 spec->wm8776.ctl[WM8776_CTL_INPUT3_SW].name = ain3_switch;
322 spec->wm8776.ctl[WM8776_CTL_INPUT4_SW].name = ain4_switch;
323 spec->wm8776.ctl[WM8776_CTL_INPUT5_SW].name = ain5_switch;
324 snd_wm8776_build_controls(&spec->wm8776);
325 spec->wm8766.ctl[WM8766_CTL_CH1_VOL].name = rear_volume;
326 spec->wm8766.ctl[WM8766_CTL_CH2_VOL].name = clfe_volume;
327 spec->wm8766.ctl[WM8766_CTL_CH3_VOL].name = NULL;
328 spec->wm8766.ctl[WM8766_CTL_CH1_SW].name = rear_switch;
329 spec->wm8766.ctl[WM8766_CTL_CH2_SW].name = clfe_switch;
330 spec->wm8766.ctl[WM8766_CTL_CH3_SW].name = NULL;
331 spec->wm8766.ctl[WM8766_CTL_PHASE1_SW].name = rear_phase;
332 spec->wm8766.ctl[WM8766_CTL_PHASE2_SW].name = clfe_phase;
333 spec->wm8766.ctl[WM8766_CTL_PHASE3_SW].name = NULL;
334 spec->wm8766.ctl[WM8766_CTL_DEEMPH1_SW].name = rear_deemph;
335 spec->wm8766.ctl[WM8766_CTL_DEEMPH2_SW].name = clfe_deemph;
336 spec->wm8766.ctl[WM8766_CTL_DEEMPH3_SW].name = NULL;
337 spec->wm8766.ctl[WM8766_CTL_IZD_SW].name = rear_clfe_izd;
338 spec->wm8766.ctl[WM8766_CTL_ZC_SW].name = rear_clfe_zc;
339 snd_wm8766_build_controls(&spec->wm8766);
363 struct psc724_spec *spec = ice->spec;
365 snd_wm8776_volume_restore(&spec->wm8776);
366 snd_wm8766_volume_restore(&spec->wm8766);
374 struct psc724_spec *spec = ice->spec;
376 snd_wm8776_resume(&spec->wm8776);
377 snd_wm8766_resume(&spec->wm8766);
387 struct psc724_spec *spec;
389 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
390 if (!spec)
392 ice->spec = spec;
393 spec->ice = ice;
397 spec->wm8776.ops.write = psc724_wm8776_write;
398 spec->wm8776.card = ice->card;
399 snd_wm8776_init(&spec->wm8776);
400 spec->wm8766.ops.write = psc724_wm8766_write;
401 spec->wm8766.card = ice->card;
406 snd_wm8766_init(&spec->wm8766);
407 snd_wm8766_set_if(&spec->wm8766,
410 INIT_DELAYED_WORK(&spec->hp_work, psc724_update_hp_jack_state);
417 struct psc724_spec *spec = ice->spec;
419 cancel_delayed_work_sync(&spec->hp_work);