Lines Matching refs:ice
106 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
108 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
114 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
116 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
123 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
128 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
135 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n");
139 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
143 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
145 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n");
153 struct snd_ice1712 *ice = ac97->private_data;
156 old_cmd = snd_vt1724_ac97_ready(ice);
159 outb(reg, ICEMT1724(ice, AC97_INDEX));
160 outw(val, ICEMT1724(ice, AC97_DATA));
161 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
162 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
167 struct snd_ice1712 *ice = ac97->private_data;
170 old_cmd = snd_vt1724_ac97_ready(ice);
173 outb(reg, ICEMT1724(ice, AC97_INDEX));
174 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
175 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
177 return inw(ICEMT1724(ice, AC97_DATA));
186 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
188 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
189 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
193 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
195 return inl(ICEREG1724(ice, GPIO_DIRECTION));
199 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
201 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
202 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
203 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
204 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
207 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
210 if (!ice->vt1720)
211 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
214 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
218 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
220 outw(data, ICEREG1724(ice, GPIO_DATA));
221 if (!ice->vt1720)
222 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
223 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
226 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
229 if (!ice->vt1720)
230 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
233 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
241 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
245 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
246 inb(ICEREG1724(ice, MPU_DATA));
250 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
252 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
256 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
258 static void vt1724_midi_write(struct snd_ice1712 *ice)
264 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
265 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
269 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
274 enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
278 static void vt1724_midi_read(struct snd_ice1712 *ice)
284 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
285 count = inb(ICEREG1724(ice, MPU_RXFIFO));
289 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
294 /* call with ice->reg_lock */
295 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
297 u8 mask = inb(ICEREG1724(ice, IRQMASK));
302 outb(mask, ICEREG1724(ice, IRQMASK));
308 struct snd_ice1712 *ice = substream->rmidi->private_data;
310 spin_lock_irq(&ice->reg_lock);
311 enable_midi_irq(ice, flag, enable);
312 spin_unlock_irq(&ice->reg_lock);
327 struct snd_ice1712 *ice = s->rmidi->private_data;
330 spin_lock_irqsave(&ice->reg_lock, flags);
332 ice->midi_output = 1;
333 vt1724_midi_write(ice);
335 ice->midi_output = 0;
336 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
338 spin_unlock_irqrestore(&ice->reg_lock, flags);
343 struct snd_ice1712 *ice = s->rmidi->private_data;
350 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
378 struct snd_ice1712 *ice = s->rmidi->private_data;
381 spin_lock_irqsave(&ice->reg_lock, flags);
383 ice->midi_input = 1;
384 vt1724_midi_read(ice);
386 ice->midi_input = 0;
388 spin_unlock_irqrestore(&ice->reg_lock, flags);
404 struct snd_ice1712 *ice = dev_id;
412 status = inb(ICEREG1724(ice, IRQSTAT));
416 spin_lock(&ice->reg_lock);
418 status = inb(ICEREG1724(ice, IRQSTAT));
419 dev_err(ice->card->dev,
422 dev_err(ice->card->dev, "Disabling MPU_TX\n");
423 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
425 spin_unlock(&ice->reg_lock);
430 if (ice->midi_output)
431 vt1724_midi_write(ice);
433 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
442 if (ice->midi_input)
443 vt1724_midi_read(ice);
445 vt1724_midi_clear_rx(ice);
448 outb(status, ICEREG1724(ice, IRQSTAT));
449 spin_unlock(&ice->reg_lock);
462 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
464 if (ice->playback_pro_substream)
465 snd_pcm_period_elapsed(ice->playback_pro_substream);
468 if (ice->capture_pro_substream)
469 snd_pcm_period_elapsed(ice->capture_pro_substream);
472 if (ice->playback_con_substream_ds[0])
473 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
476 if (ice->playback_con_substream_ds[1])
477 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
480 if (ice->playback_con_substream_ds[2])
481 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
484 if (ice->playback_con_substream)
485 snd_pcm_period_elapsed(ice->playback_con_substream);
488 if (ice->capture_con_substream)
489 snd_pcm_period_elapsed(ice->capture_con_substream);
492 outb(mtstat, ICEMT1724(ice, IRQ));
495 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
496 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
497 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
550 if (snd_pcm_substream_chip(s) == ice) {
561 spin_lock(&ice->reg_lock);
562 old = inb(ICEMT1724(ice, DMA_PAUSE));
567 outb(old, ICEMT1724(ice, DMA_PAUSE));
568 spin_unlock(&ice->reg_lock);
574 spin_lock(&ice->reg_lock);
575 old = inb(ICEMT1724(ice, DMA_CONTROL));
580 outb(old, ICEMT1724(ice, DMA_CONTROL));
581 spin_unlock(&ice->reg_lock);
607 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
609 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
612 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
617 outb(i, ICEMT1724(ice, RATE));
623 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
628 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
629 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
635 outb(val, ICEMT1724(ice, I2S_FORMAT));
644 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
652 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
655 spin_lock_irqsave(&ice->reg_lock, flags);
656 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
657 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
659 spin_unlock_irqrestore(&ice->reg_lock, flags);
660 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
662 if (!force && is_pro_rate_locked(ice)) {
665 spin_unlock_irqrestore(&ice->reg_lock, flags);
666 return (rate == ice->cur_rate) ? 0 : -EBUSY;
669 if (force || !ice->is_spdif_master(ice)) {
672 old_rate = ice->get_rate(ice);
675 else if (rate == ice->cur_rate) {
676 spin_unlock_irqrestore(&ice->reg_lock, flags);
681 ice->cur_rate = rate;
682 spin_unlock_irqrestore(&ice->reg_lock, flags);
685 ice->set_rate(ice, rate);
688 mclk_change = ice->set_mclk(ice, rate);
690 if (mclk_change && ice->gpio.i2s_mclk_changed)
691 ice->gpio.i2s_mclk_changed(ice);
692 if (ice->gpio.set_pro_rate)
693 ice->gpio.set_pro_rate(ice, rate);
696 for (i = 0; i < ice->akm_codecs; i++) {
697 if (ice->akm[i].ops.set_rate_val)
698 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
700 if (ice->spdif.ops.setup_rate)
701 ice->spdif.ops.setup_rate(ice, rate);
709 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
713 mutex_lock(&ice->open_mutex);
715 if (substream == ice->playback_pro_substream) {
719 if (ice->pcm_reserved[i] &&
720 ice->pcm_reserved[i] != substream) {
721 mutex_unlock(&ice->open_mutex);
724 ice->pcm_reserved[i] = substream;
727 if (ice->pcm_reserved[i] == substream)
728 ice->pcm_reserved[i] = NULL;
733 if (ice->playback_con_substream_ds[i] == substream) {
734 if (ice->pcm_reserved[i] &&
735 ice->pcm_reserved[i] != substream) {
736 mutex_unlock(&ice->open_mutex);
739 ice->pcm_reserved[i] = substream;
744 mutex_unlock(&ice->open_mutex);
746 return snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
751 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
754 mutex_lock(&ice->open_mutex);
757 if (ice->pcm_reserved[i] == substream)
758 ice->pcm_reserved[i] = NULL;
759 mutex_unlock(&ice->open_mutex);
765 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
769 spin_lock_irq(&ice->reg_lock);
771 outb(val, ICEMT1724(ice, BURST));
773 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
776 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
777 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
778 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
780 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
781 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
782 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
784 spin_unlock_irq(&ice->reg_lock);
787 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, "
799 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
802 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
805 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
807 dev_dbg(ice->card->dev, "invalid negative ptr\n");
813 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
818 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
826 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
836 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
839 spin_lock_irq(&ice->reg_lock);
840 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
842 ice->profi_port + reg->size);
844 ice->profi_port + reg->count);
845 spin_unlock_irq(&ice->reg_lock);
851 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
855 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
858 ptr = inl(ice->profi_port + reg->addr);
862 ptr = inw(ice->profi_port + reg->size);
870 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
971 static void set_std_hw_rates(struct snd_ice1712 *ice)
973 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
976 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
977 ice->hw_rates = &hw_constraints_rates_192;
979 ice->hw_rates = &hw_constraints_rates_96;
982 ice->hw_rates = &hw_constraints_rates_48;
986 static int set_rate_constraints(struct snd_ice1712 *ice,
991 runtime->hw.rate_min = ice->hw_rates->list[0];
992 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
996 ice->hw_rates);
1004 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1007 if (is_pro_rate_locked(ice)) {
1008 rate = ice->get_rate(ice);
1026 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1030 ice->playback_pro_substream = substream;
1034 set_rate_constraints(ice, substream);
1035 mutex_lock(&ice->open_mutex);
1037 num_indeps = ice->num_total_dacs / 2 - 1;
1039 if (ice->pcm_reserved[chs])
1046 mutex_unlock(&ice->open_mutex);
1052 if (ice->pro_open)
1053 ice->pro_open(ice, substream);
1059 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1063 ice->capture_pro_substream = substream;
1067 set_rate_constraints(ice, substream);
1073 if (ice->pro_open)
1074 ice->pro_open(ice, substream);
1080 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1083 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1084 ice->playback_pro_substream = NULL;
1091 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1094 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1095 ice->capture_pro_substream = NULL;
1119 static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1124 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) ==
1129 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm);
1138 pcm->private_data = ice;
1143 &ice->pci->dev, 256*1024, 256*1024);
1145 ice->pcm_pro = pcm;
1156 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1160 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1163 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1164 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1166 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1167 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1171 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1176 spin_lock_irqsave(&ice->reg_lock, flags);
1177 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1189 update_spdif_bits(ice, nval);
1190 spin_unlock_irqrestore(&ice->reg_lock, flags);
1195 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1196 if (!ice->force_pdma4)
1197 update_spdif_rate(ice, substream->runtime->rate);
1203 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1207 ice->playback_con_substream = substream;
1208 if (ice->force_pdma4) {
1210 set_rate_constraints(ice, substream);
1220 if (ice->spdif.ops.open)
1221 ice->spdif.ops.open(ice, substream);
1227 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1230 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1231 ice->playback_con_substream = NULL;
1232 if (ice->spdif.ops.close)
1233 ice->spdif.ops.close(ice, substream);
1240 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1244 ice->capture_con_substream = substream;
1245 if (ice->force_rdma1) {
1247 set_rate_constraints(ice, substream);
1257 if (ice->spdif.ops.open)
1258 ice->spdif.ops.open(ice, substream);
1264 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1267 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1268 ice->capture_con_substream = NULL;
1269 if (ice->spdif.ops.close)
1270 ice->spdif.ops.close(ice, substream);
1296 static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1303 if (ice->force_pdma4 ||
1304 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1306 ice->has_spdif = 1;
1309 if (ice->force_rdma1 ||
1310 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1312 ice->has_spdif = 1;
1318 if (ice->force_pdma4 || ice->force_rdma1)
1322 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1333 pcm->private_data = ice;
1338 &ice->pci->dev, 256*1024, 256*1024);
1340 ice->pcm = pcm;
1373 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1376 spin_lock_irq(&ice->reg_lock);
1378 if (inb(ICEMT1724(ice, BURST)) < val)
1379 outb(val, ICEMT1724(ice, BURST));
1380 spin_unlock_irq(&ice->reg_lock);
1386 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1389 mutex_lock(&ice->open_mutex);
1391 if (ice->pcm_reserved[substream->number]) {
1392 mutex_unlock(&ice->open_mutex);
1395 mutex_unlock(&ice->open_mutex);
1397 ice->playback_con_substream_ds[substream->number] = substream;
1401 set_rate_constraints(ice, substream);
1407 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1410 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1411 ice->playback_con_substream_ds[substream->number] = NULL;
1412 ice->pcm_reserved[substream->number] = NULL;
1428 static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1434 play = ice->num_total_dacs / 2 - 1;
1438 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1445 pcm->private_data = ice;
1450 &ice->pci->dev, 256*1024, 256*1024);
1452 ice->pcm_ds = pcm;
1462 static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1466 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1475 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1477 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1479 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1483 ac97.private_data = ice;
1484 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1486 dev_warn(ice->card->dev,
1492 strcat(ice->card->mixername, "ICE1724 - multitrack");
1500 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1502 return (unsigned int)ice->eeprom.data[idx] | \
1503 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1504 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1510 struct snd_ice1712 *ice = entry->private_data;
1513 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1516 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1517 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1518 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1520 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1522 ice->eeprom.data[ICE_EEP2_ACLINK]);
1524 ice->eeprom.data[ICE_EEP2_I2S]);
1526 ice->eeprom.data[ICE_EEP2_SPDIF]);
1528 ice->eeprom.gpiodir);
1530 ice->eeprom.gpiomask);
1532 ice->eeprom.gpiostate);
1533 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1535 idx, ice->eeprom.data[idx]);
1540 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1543 idx, inb(ice->port+idx));
1546 idx, inb(ice->profi_port+idx));
1549 static void snd_vt1724_proc_init(struct snd_ice1712 *ice)
1551 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read);
1569 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1571 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1666 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1668 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1676 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1680 spin_lock_irq(&ice->reg_lock);
1681 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1683 update_spdif_bits(ice, val);
1684 spin_unlock_irq(&ice->reg_lock);
1743 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1744 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1752 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1755 spin_lock_irq(&ice->reg_lock);
1756 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1761 outb(val, ICEREG1724(ice, SPDIF_CFG));
1762 spin_unlock_irq(&ice->reg_lock);
1788 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1792 snd_ice1712_save_gpio_status(ice);
1794 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1795 snd_ice1712_restore_gpio_status(ice);
1802 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1810 snd_ice1712_save_gpio_status(ice);
1811 val = snd_ice1712_gpio_read(ice);
1814 snd_ice1712_gpio_write(ice, nval);
1815 snd_ice1712_restore_gpio_status(ice);
1826 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1827 int hw_rates_count = ice->hw_rates->count;
1834 if (ice->force_rdma1 ||
1835 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN))
1836 uinfo->value.enumerated.items += ice->ext_clock_count;
1843 ice->ext_clock_names[
1848 ice->hw_rates->list[uinfo->value.enumerated.item]);
1855 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1858 spin_lock_irq(&ice->reg_lock);
1859 if (ice->is_spdif_master(ice)) {
1860 ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
1861 ice->get_spdif_master_type(ice);
1863 rate = ice->get_rate(ice);
1865 for (i = 0; i < ice->hw_rates->count; i++) {
1866 if (ice->hw_rates->list[i] == rate) {
1872 spin_unlock_irq(&ice->reg_lock);
1876 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
1883 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
1887 oval = inb(ICEMT1724(ice, RATE));
1888 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1890 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1891 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1899 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1902 unsigned int first_ext_clock = ice->hw_rates->count;
1904 if (item > first_ext_clock + ice->ext_clock_count - 1)
1908 spin_lock_irq(&ice->reg_lock);
1909 if (ice->is_spdif_master(ice))
1912 old_rate = ice->get_rate(ice);
1915 ice->set_spdif_clock(ice, item - first_ext_clock);
1919 new_rate = ice->hw_rates->list[item];
1920 ice->pro_rate_default = new_rate;
1921 spin_unlock_irq(&ice->reg_lock);
1922 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1923 spin_lock_irq(&ice->reg_lock);
1925 spin_unlock_irq(&ice->reg_lock);
1931 if (ice->gpio.set_pro_rate)
1932 ice->gpio.set_pro_rate(ice, 0);
1933 for (i = 0; i < ice->akm_codecs; i++) {
1934 if (ice->akm[i].ops.set_rate_val)
1935 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1961 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1965 spin_lock_irq(&ice->reg_lock);
1968 spin_unlock_irq(&ice->reg_lock);
1992 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1996 spin_lock_irq(&ice->reg_lock);
1999 spin_unlock_irq(&ice->reg_lock);
2037 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
2045 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2056 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
2070 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2075 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2082 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2085 snd_ice1724_get_route_val(ice, analog_route_shift(idx));
2092 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2094 return snd_ice1724_put_route_val(ice,
2102 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2105 snd_ice1724_get_route_val(ice, digital_route_shift(idx));
2112 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2114 return snd_ice1724_put_route_val(ice,
2151 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2154 spin_lock_irq(&ice->reg_lock);
2156 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
2158 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
2160 spin_unlock_irq(&ice->reg_lock);
2235 static void wait_i2c_busy(struct snd_ice1712 *ice)
2238 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2241 dev_err(ice->card->dev, "i2c busy timeout\n");
2244 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2249 mutex_lock(&ice->i2c_mutex);
2250 wait_i2c_busy(ice);
2251 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2252 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2253 wait_i2c_busy(ice);
2254 val = inb(ICEREG1724(ice, I2C_DATA));
2255 mutex_unlock(&ice->i2c_mutex);
2257 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
2262 void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2265 mutex_lock(&ice->i2c_mutex);
2266 wait_i2c_busy(ice);
2268 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
2270 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2271 outb(data, ICEREG1724(ice, I2C_DATA));
2272 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2273 wait_i2c_busy(ice);
2274 mutex_unlock(&ice->i2c_mutex);
2277 static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2285 ice->eeprom.subvendor = 0;
2286 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2287 ice->eeprom.subvendor =
2288 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
2289 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2290 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
2291 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
2292 if (ice->eeprom.subvendor == 0 ||
2293 ice->eeprom.subvendor == (unsigned int)-1) {
2298 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2300 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2301 ice->eeprom.subvendor =
2303 if (ice->eeprom.subvendor == 0 ||
2304 ice->eeprom.subvendor == (unsigned int)-1) {
2305 dev_err(ice->card->dev,
2315 dev_info(ice->card->dev,
2318 ice->eeprom.subvendor = c->subvendor;
2319 } else if (c->subvendor != ice->eeprom.subvendor)
2321 ice->card_info = c;
2325 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2326 ice->eeprom.version = 2;
2327 ice->eeprom.size = c->eeprom_size + 6;
2328 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2332 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2333 ice->eeprom.subvendor);
2336 ice->pm_suspend_enabled = 1;
2340 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2341 if (ice->eeprom.size < 6)
2342 ice->eeprom.size = 32;
2343 else if (ice->eeprom.size > 32) {
2344 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n",
2345 ice->eeprom.size);
2348 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2349 if (ice->eeprom.version != 1 && ice->eeprom.version != 2)
2350 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n",
2351 ice->eeprom.version);
2352 size = ice->eeprom.size - 6;
2354 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2357 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2358 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2359 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2366 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
2368 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2369 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2371 outb(0, ICEREG1724(ice, CONTROL));
2372 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2376 static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
2378 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2379 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2380 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2381 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2383 ice->gpio.write_mask = ice->eeprom.gpiomask;
2384 ice->gpio.direction = ice->eeprom.gpiodir;
2385 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2386 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2387 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2389 outb(0, ICEREG1724(ice, POWERDOWN));
2392 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
2397 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2402 static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
2407 if (snd_BUG_ON(!ice->pcm))
2410 if (!ice->own_routing) {
2411 err = snd_ctl_add(ice->card,
2412 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2417 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2421 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2424 kctl->id.device = ice->pcm->device;
2425 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2428 kctl->id.device = ice->pcm->device;
2429 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2432 kctl->id.device = ice->pcm->device;
2434 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2437 kctl->id.device = ice->pcm->device;
2438 ice->spdif.stream_ctl = kctl;
2444 static int snd_vt1724_build_controls(struct snd_ice1712 *ice)
2448 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2451 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2455 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2458 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2462 if (!ice->own_routing && ice->num_total_dacs > 0) {
2464 tmp.count = ice->num_total_dacs;
2465 if (ice->vt1720 && tmp.count > 2)
2467 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2472 return snd_ctl_add(ice->card,
2473 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2476 static int snd_vt1724_free(struct snd_ice1712 *ice)
2478 if (!ice->port)
2481 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2482 outb(0xff, ICEREG1724(ice, IRQMASK));
2485 if (ice->irq >= 0)
2486 free_irq(ice->irq, ice);
2487 pci_release_regions(ice->pci);
2488 snd_ice1712_akm4xxx_free(ice);
2489 pci_disable_device(ice->pci);
2490 kfree(ice->spec);
2491 kfree(ice);
2497 struct snd_ice1712 *ice = device->device_data;
2498 return snd_vt1724_free(ice);
2506 struct snd_ice1712 *ice;
2519 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2520 if (ice == NULL) {
2524 ice->vt1724 = 1;
2525 spin_lock_init(&ice->reg_lock);
2526 mutex_init(&ice->gpio_mutex);
2527 mutex_init(&ice->open_mutex);
2528 mutex_init(&ice->i2c_mutex);
2529 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2530 ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
2531 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2532 ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
2533 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2534 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2535 ice->card = card;
2536 ice->pci = pci;
2537 ice->irq = -1;
2539 snd_vt1724_proc_init(ice);
2541 card->private_data = ice;
2545 kfree(ice);
2549 ice->port = pci_resource_start(pci, 0);
2550 ice->profi_port = pci_resource_start(pci, 1);
2553 IRQF_SHARED, KBUILD_MODNAME, ice)) {
2555 snd_vt1724_free(ice);
2559 ice->irq = pci->irq;
2560 card->sync_irq = ice->irq;
2562 snd_vt1724_chip_reset(ice);
2563 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2564 snd_vt1724_free(ice);
2567 if (snd_vt1724_chip_init(ice) < 0) {
2568 snd_vt1724_free(ice);
2572 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2574 snd_vt1724_free(ice);
2578 *r_ice1712 = ice;
2594 struct snd_ice1712 *ice;
2613 err = snd_vt1724_create(card, pci, model[dev], &ice);
2620 ice->ext_clock_count = 0;
2626 (c->subvendor == ice->eeprom.subvendor)) {
2631 err = c->chip_init(ice);
2651 ice->pro_rate_default = PRO_RATE_DEFAULT;
2652 if (!ice->is_spdif_master)
2653 ice->is_spdif_master = stdclock_is_spdif_master;
2654 if (!ice->get_rate)
2655 ice->get_rate = stdclock_get_rate;
2656 if (!ice->set_rate)
2657 ice->set_rate = stdclock_set_rate;
2658 if (!ice->set_mclk)
2659 ice->set_mclk = stdclock_set_mclk;
2660 if (!ice->set_spdif_clock)
2661 ice->set_spdif_clock = stdclock_set_spdif_clock;
2662 if (!ice->get_spdif_master_type)
2663 ice->get_spdif_master_type = stdclock_get_spdif_master_type;
2664 if (!ice->ext_clock_names)
2665 ice->ext_clock_names = ext_clock_names;
2666 if (!ice->ext_clock_count)
2667 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
2669 if (!ice->hw_rates)
2670 set_std_hw_rates(ice);
2672 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2678 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2684 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2690 err = snd_vt1724_ac97_mixer(ice);
2696 err = snd_vt1724_build_controls(ice);
2702 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2703 err = snd_vt1724_spdif_build_controls(ice);
2711 err = c->build_controls(ice);
2719 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2727 ice->rmidi[0] = rmidi;
2728 rmidi->private_data = ice;
2740 ICEREG1724(ice, MPU_FIFO_WM));
2741 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
2743 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
2748 card->shortname, ice->port, ice->irq);
2763 struct snd_ice1712 *ice = card->private_data;
2765 if (ice->card_info && ice->card_info->chip_exit)
2766 ice->card_info->chip_exit(ice);
2774 struct snd_ice1712 *ice = card->private_data;
2776 if (!ice->pm_suspend_enabled)
2781 snd_ac97_suspend(ice->ac97);
2783 spin_lock_irq(&ice->reg_lock);
2784 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
2785 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
2786 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
2787 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2788 spin_unlock_irq(&ice->reg_lock);
2790 if (ice->pm_suspend)
2791 ice->pm_suspend(ice);
2798 struct snd_ice1712 *ice = card->private_data;
2800 if (!ice->pm_suspend_enabled)
2803 snd_vt1724_chip_reset(ice);
2805 if (snd_vt1724_chip_init(ice) < 0) {
2810 if (ice->pm_resume)
2811 ice->pm_resume(ice);
2813 if (ice->pm_saved_is_spdif_master) {
2815 ice->set_spdif_clock(ice, 0);
2819 if (ice->cur_rate)
2820 rate = ice->cur_rate;
2822 rate = ice->pro_rate_default;
2823 snd_vt1724_set_pro_rate(ice, rate, 1);
2826 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
2828 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
2829 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
2831 snd_ac97_resume(ice->ac97);