Lines Matching defs:boxbits
23 unsigned char boxbits[4];
45 ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
46 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
54 ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
55 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
63 ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
64 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
75 ICE1712_STDSP24_0_BOX(spec->boxbits, box);
76 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
80 ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
81 ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
82 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
83 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
85 ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
86 ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
87 ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
88 ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
89 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
90 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
93 ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
94 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
97 case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
98 case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
99 case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
101 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
104 ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
105 ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
106 ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
107 ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
108 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
109 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
112 ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
113 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
125 ICE1712_STDSP24_0_BOX(spec->boxbits, box);
126 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
128 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
129 ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
130 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
131 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
135 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
136 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
140 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
141 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
150 ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
151 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
168 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
169 ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
170 ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
171 ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
173 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
174 ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
175 ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
176 ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
177 ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
179 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
180 ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
181 ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
182 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
183 ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
185 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
186 ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
187 ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
188 ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
189 ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);