Lines Matching refs:codec

1101 	struct hda_codec *codec;
1479 * CA0132 codec access
1481 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid,
1485 response = snd_hda_codec_read(codec, nid, 0, verb, parm);
1491 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid,
1494 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT,
1498 static int codec_set_converter_stream_channel(struct hda_codec *codec,
1505 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID,
1510 static int chipio_send(struct hda_codec *codec,
1519 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1532 static int chipio_write_address(struct hda_codec *codec,
1535 struct ca0132_spec *spec = codec->spec;
1542 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
1547 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
1559 static int chipio_write_data(struct hda_codec *codec, unsigned int data)
1561 struct ca0132_spec *spec = codec->spec;
1565 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
1569 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
1583 static int chipio_write_data_multiple(struct hda_codec *codec,
1590 codec_dbg(codec, "chipio_write_data null ptr\n");
1595 status = chipio_write_data(codec, *data++);
1604 static int chipio_read_data(struct hda_codec *codec, unsigned int *data)
1606 struct ca0132_spec *spec = codec->spec;
1610 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
1614 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
1619 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1635 static int chipio_write(struct hda_codec *codec,
1638 struct ca0132_spec *spec = codec->spec;
1644 err = chipio_write_address(codec, chip_addx);
1648 err = chipio_write_data(codec, data);
1661 static int chipio_write_no_mutex(struct hda_codec *codec,
1668 err = chipio_write_address(codec, chip_addx);
1672 err = chipio_write_data(codec, data);
1684 static int chipio_write_multiple(struct hda_codec *codec,
1689 struct ca0132_spec *spec = codec->spec;
1693 status = chipio_write_address(codec, chip_addx);
1697 status = chipio_write_data_multiple(codec, data, count);
1708 static int chipio_read(struct hda_codec *codec,
1711 struct ca0132_spec *spec = codec->spec;
1717 err = chipio_write_address(codec, chip_addx);
1721 err = chipio_read_data(codec, data);
1733 static void chipio_set_control_flag(struct hda_codec *codec,
1742 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1749 static void chipio_set_control_param(struct hda_codec *codec,
1752 struct ca0132_spec *spec = codec->spec;
1757 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1761 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {
1762 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1765 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1776 static void chipio_set_control_param_no_mutex(struct hda_codec *codec,
1783 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1786 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {
1787 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1790 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1800 static void chipio_set_stream_source_dest(struct hda_codec *codec,
1803 chipio_set_control_param_no_mutex(codec,
1805 chipio_set_control_param_no_mutex(codec,
1807 chipio_set_control_param_no_mutex(codec,
1814 static void chipio_set_stream_channels(struct hda_codec *codec,
1817 chipio_set_control_param_no_mutex(codec,
1819 chipio_set_control_param_no_mutex(codec,
1826 static void chipio_set_stream_control(struct hda_codec *codec,
1829 chipio_set_control_param_no_mutex(codec,
1831 chipio_set_control_param_no_mutex(codec,
1839 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec,
1842 chipio_set_control_param_no_mutex(codec,
1844 chipio_set_control_param_no_mutex(codec,
1851 static void chipio_set_conn_rate(struct hda_codec *codec,
1854 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid);
1855 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE,
1864 static void chipio_8051_write_direct(struct hda_codec *codec,
1870 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr);
1876 static void chipio_enable_clocks(struct hda_codec *codec)
1878 struct ca0132_spec *spec = codec->spec;
1881 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1883 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1885 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1887 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1889 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1891 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1899 static int dspio_send(struct hda_codec *codec, unsigned int reg,
1907 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data);
1919 static void dspio_write_wait(struct hda_codec *codec)
1925 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
1937 static int dspio_write(struct hda_codec *codec, unsigned int scp_data)
1939 struct ca0132_spec *spec = codec->spec;
1942 dspio_write_wait(codec);
1945 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW,
1950 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH,
1956 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
1968 static int dspio_write_multiple(struct hda_codec *codec,
1979 status = dspio_write(codec, *buffer++);
1988 static int dspio_read(struct hda_codec *codec, unsigned int *data)
1992 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0);
1996 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0);
2001 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
2007 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer,
2021 status = dspio_read(codec, buffer++);
2030 status = dspio_read(codec, &dummy);
2100 static void dspio_clear_response_queue(struct hda_codec *codec)
2108 status = dspio_read(codec, &dummy);
2112 static int dspio_get_response_data(struct hda_codec *codec)
2114 struct ca0132_spec *spec = codec->spec;
2118 if (dspio_read(codec, &data) < 0)
2125 dspio_read_multiple(codec, spec->scp_resp_data,
2136 static int dspio_send_scp_message(struct hda_codec *codec,
2143 struct ca0132_spec *spec = codec->spec;
2182 status = dspio_write_multiple(codec, (unsigned int *)send_buf,
2214 * @codec: the HDA codec
2226 static int dspio_scp(struct hda_codec *codec,
2243 codec_dbg(codec, "dspio_scp get but has no buffer\n");
2248 codec_dbg(codec, "dspio_scp bad resp buf len parms\n");
2261 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send,
2266 codec_dbg(codec, "dspio_scp: send scp msg failed\n");
2285 codec_dbg(codec, "reply too long for buf\n");
2288 codec_dbg(codec, "RetLen and HdrLen .NE.\n");
2291 codec_dbg(codec, "NULL reply\n");
2298 codec_dbg(codec, "reply ill-formed or errflag set\n");
2308 static int dspio_set_param(struct hda_codec *codec, int mod_id,
2311 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL,
2315 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id,
2318 return dspio_set_param(codec, mod_id, 0x20, req, &data,
2322 static int dspio_set_uint_param_no_source(struct hda_codec *codec, int mod_id,
2325 return dspio_set_param(codec, mod_id, 0x00, req, &data,
2332 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan)
2337 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n");
2338 status = dspio_scp(codec, MASTERCONTROL, 0x20,
2343 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n");
2348 codec_dbg(codec, "no free dma channels to allocate\n");
2352 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan);
2353 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n");
2361 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan)
2366 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n");
2367 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan);
2369 status = dspio_scp(codec, MASTERCONTROL, 0x20,
2374 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n");
2378 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n");
2386 static int dsp_set_run_state(struct hda_codec *codec)
2392 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg);
2402 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
2409 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
2421 static int dsp_reset(struct hda_codec *codec)
2426 codec_dbg(codec, "dsp_reset\n");
2428 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0);
2433 codec_dbg(codec, "dsp_reset timeout\n");
2464 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan)
2468 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg);
2474 static int dsp_dma_setup_common(struct hda_codec *codec,
2486 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n");
2489 codec_dbg(codec, "dma chan num invalid\n");
2493 if (dsp_is_dma_active(codec, dma_chan)) {
2494 codec_dbg(codec, "dma already active\n");
2501 codec_dbg(codec, "invalid chip addr\n");
2508 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n");
2511 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET,
2515 codec_dbg(codec, "read CHNLPROP Reg fail\n");
2518 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n");
2528 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop);
2530 codec_dbg(codec, "write CHNLPROP Reg fail\n");
2533 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n");
2536 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET,
2540 codec_dbg(codec, "read ACTIVE Reg fail\n");
2543 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n");
2549 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active);
2551 codec_dbg(codec, "write ACTIVE Reg fail\n");
2555 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n");
2557 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan),
2560 codec_dbg(codec, "write AUDCHSEL Reg fail\n");
2563 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n");
2565 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan),
2568 codec_dbg(codec, "write IRQCNT Reg fail\n");
2571 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n");
2573 codec_dbg(codec,
2579 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n");
2587 static int dsp_dma_setup(struct hda_codec *codec,
2605 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n");
2608 codec_dbg(codec, "count too big\n");
2614 codec_dbg(codec, "invalid chip addr\n");
2618 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n");
2632 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan),
2635 codec_dbg(codec, "write DMACFG Reg fail\n");
2638 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n");
2643 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan),
2646 codec_dbg(codec, "write DSPADROFS Reg fail\n");
2649 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n");
2657 status = chipio_write(codec,
2660 codec_dbg(codec, "write XFRCNT Reg fail\n");
2663 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n");
2665 codec_dbg(codec,
2670 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n");
2678 static int dsp_dma_start(struct hda_codec *codec,
2684 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n");
2687 status = chipio_read(codec,
2691 codec_dbg(codec, "read CHNLSTART reg fail\n");
2694 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n");
2700 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
2703 codec_dbg(codec, "write CHNLSTART reg fail\n");
2706 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n");
2714 static int dsp_dma_stop(struct hda_codec *codec,
2720 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n");
2723 status = chipio_read(codec,
2727 codec_dbg(codec, "read CHNLSTART reg fail\n");
2730 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n");
2735 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
2738 codec_dbg(codec, "write CHNLSTART reg fail\n");
2741 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n");
2749 * @codec: the HDA codec
2757 static int dsp_allocate_router_ports(struct hda_codec *codec,
2767 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2775 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2779 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2783 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2787 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
2798 static int dsp_free_router_ports(struct hda_codec *codec)
2802 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2806 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2810 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2818 static int dsp_allocate_ports(struct hda_codec *codec,
2824 codec_dbg(codec, " dsp_allocate_ports() -- begin\n");
2827 codec_dbg(codec, "bad rate multiple\n");
2831 status = dsp_allocate_router_ports(codec, num_chans,
2834 codec_dbg(codec, " dsp_allocate_ports() -- complete\n");
2839 static int dsp_allocate_ports_format(struct hda_codec *codec,
2851 codec_dbg(codec, "bad rate multiple\n");
2857 status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map);
2865 static int dsp_free_ports(struct hda_codec *codec)
2869 codec_dbg(codec, " dsp_free_ports() -- begin\n");
2871 status = dsp_free_router_ports(codec);
2873 codec_dbg(codec, "free router ports fail\n");
2876 codec_dbg(codec, " dsp_free_ports() -- complete\n");
2885 struct hda_codec *codec;
2897 static int dma_convert_to_hda_format(struct hda_codec *codec,
2918 struct hda_codec *codec = dma->codec;
2919 struct ca0132_spec *spec = codec->spec;
2923 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab);
2925 status = snd_hda_codec_load_dsp_prepare(codec,
2950 snd_hda_codec_load_dsp_trigger(dma->codec, cmd);
2982 struct ca0132_spec *spec = dma->codec->spec;
3033 static int dspxfr_hci_write(struct hda_codec *codec,
3041 codec_dbg(codec, "hci_write invalid params\n");
3048 status = chipio_write(codec, data[0], data[1]);
3050 codec_dbg(codec, "hci_write chipio failed\n");
3063 * @codec: the HDA codec
3074 static int dspxfr_one_seg(struct hda_codec *codec,
3110 codec_dbg(codec, "hci_write\n");
3111 return dspxfr_hci_write(codec, hci_write);
3115 codec_dbg(codec, "Invalid Params\n");
3124 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0;
3131 codec_dbg(codec, "Invalid chip_addx Params\n");
3141 codec_dbg(codec, "dma_engine buffer NULL\n");
3154 codec_dbg(codec, "frmsz zero\n");
3162 codec_dbg(codec,
3169 codec_dbg(codec, "dspxfr_one_seg:failed\n");
3183 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n",
3187 status = dsp_dma_stop(codec, dma_chan, ovly);
3190 status = dsp_dma_setup_common(codec, chip_addx,
3197 status = dsp_dma_setup(codec, chip_addx,
3201 status = dsp_dma_start(codec, dma_chan, ovly);
3204 if (!dsp_is_dma_active(codec, dma_chan)) {
3205 codec_dbg(codec, "dspxfr:DMA did not start\n");
3212 status = chipio_write_multiple(codec,
3221 status = dspxfr_hci_write(codec, hci_write);
3229 dma_active = dsp_is_dma_active(codec, dma_chan);
3237 codec_dbg(codec, "+++++ DMA complete\n");
3250 status = chipio_write_multiple(codec, chip_addx_remainder,
3260 * @codec: the HDA codec
3270 static int dspxfr_image(struct hda_codec *codec,
3277 struct ca0132_spec *spec = codec->spec;
3299 dma_engine->codec = codec;
3300 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format);
3307 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL,
3311 codec_dbg(codec, "set converter format fail\n");
3315 status = snd_hda_codec_load_dsp_prepare(codec,
3324 status = dspio_alloc_dma_chan(codec, &dma_chan);
3326 codec_dbg(codec, "alloc dmachan fail\n");
3333 status = dsp_allocate_ports_format(codec, hda_format,
3336 codec_dbg(codec, "alloc ports fail\n");
3341 status = codec_set_converter_stream_channel(codec,
3344 codec_dbg(codec, "set stream chan fail\n");
3350 codec_dbg(codec, "FLS check fail\n");
3354 status = dspxfr_one_seg(codec, fls_data, reloc,
3368 status = dsp_free_ports(codec);
3373 status = codec_set_converter_stream_channel(codec,
3378 dspio_free_dma_chan(codec, dma_chan);
3381 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab);
3391 static void dspload_post_setup(struct hda_codec *codec)
3393 struct ca0132_spec *spec = codec->spec;
3394 codec_dbg(codec, "---- dspload_post_setup ------\n");
3397 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080);
3398 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000);
3401 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002);
3408 * @codec: the HDA codec
3423 static int dspload_image(struct hda_codec *codec,
3434 codec_dbg(codec, "---- dspload_image begin ------\n");
3451 codec_dbg(codec, "Ready to program DMA\n");
3453 status = dsp_reset(codec);
3458 codec_dbg(codec, "dsp_reset() complete\n");
3459 status = dspxfr_image(codec, fls, reloc, sample_rate, channels,
3465 codec_dbg(codec, "dspxfr_image() complete\n");
3467 dspload_post_setup(codec);
3468 status = dsp_set_run_state(codec);
3471 codec_dbg(codec, "LOAD FINISHED\n");
3478 static bool dspload_is_loaded(struct hda_codec *codec)
3483 status = chipio_read(codec, 0x40004, &data);
3490 #define dspload_is_loaded(codec) false
3493 static bool dspload_wait_loaded(struct hda_codec *codec)
3498 if (dspload_is_loaded(codec)) {
3499 codec_info(codec, "ca0132 DSP downloaded and running\n");
3505 codec_err(codec, "ca0132 failed to download DSP\n");
3524 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin,
3527 struct ca0132_spec *spec = codec->spec;
3544 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group,
3547 struct ca0132_spec *spec = codec->spec;
3583 static void ca0113_mmio_command_set_type2(struct hda_codec *codec,
3586 struct ca0132_spec *spec = codec->spec;
3623 static void ca0132_gpio_init(struct hda_codec *codec)
3625 struct ca0132_spec *spec = codec->spec;
3631 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
3632 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
3633 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23);
3636 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
3637 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B);
3646 static void ca0132_gpio_setup(struct hda_codec *codec)
3648 struct ca0132_spec *spec = codec->spec;
3652 snd_hda_codec_write(codec, 0x01, 0,
3654 snd_hda_codec_write(codec, 0x01, 0,
3656 snd_hda_codec_write(codec, 0x01, 0,
3658 snd_hda_codec_write(codec, 0x01, 0,
3662 snd_hda_codec_write(codec, 0x01, 0,
3664 snd_hda_codec_write(codec, 0x01, 0,
3666 snd_hda_codec_write(codec, 0x01, 0,
3716 static void r3di_gpio_mic_set(struct hda_codec *codec,
3722 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);
3732 snd_hda_codec_write(codec, codec->core.afg, 0,
3736 static void r3di_gpio_dsp_status_set(struct hda_codec *codec,
3742 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);
3747 snd_hda_codec_write(codec, codec->core.afg, 0,
3754 snd_hda_codec_write(codec, codec->core.afg, 0,
3761 snd_hda_codec_write(codec, codec->core.afg, 0,
3769 struct hda_codec *codec,
3774 struct ca0132_spec *spec = codec->spec;
3776 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format);
3782 struct hda_codec *codec,
3785 struct ca0132_spec *spec = codec->spec;
3795 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
3801 struct hda_codec *codec,
3804 struct ca0132_spec *spec = codec->spec;
3829 struct hda_codec *codec,
3832 struct ca0132_spec *spec = codec->spec;
3833 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3837 struct hda_codec *codec,
3842 struct ca0132_spec *spec = codec->spec;
3843 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3848 struct hda_codec *codec,
3851 struct ca0132_spec *spec = codec->spec;
3852 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
3856 struct hda_codec *codec,
3859 struct ca0132_spec *spec = codec->spec;
3860 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3867 struct hda_codec *codec,
3872 snd_hda_codec_setup_stream(codec, hinfo->nid,
3879 struct hda_codec *codec,
3882 struct ca0132_spec *spec = codec->spec;
3887 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
3892 struct hda_codec *codec,
3895 struct ca0132_spec *spec = codec->spec;
4105 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid,
4116 snd_hda_power_up(codec);
4117 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20,
4120 snd_hda_power_down(codec);
4128 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4129 struct ca0132_spec *spec = codec->spec;
4154 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4155 struct ca0132_spec *spec = codec->spec;
4168 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx);
4189 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4190 struct ca0132_spec *spec = codec->spec;
4203 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx);
4224 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4225 struct ca0132_spec *spec = codec->spec;
4238 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx);
4246 static int add_tuning_control(struct hda_codec *codec,
4283 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
4286 static int add_tuning_ctls(struct hda_codec *codec)
4292 err = add_tuning_control(codec,
4304 static void ca0132_init_tuning_defaults(struct hda_codec *codec)
4306 struct ca0132_spec *spec = codec->spec;
4326 static int ca0132_select_out(struct hda_codec *codec)
4328 struct ca0132_spec *spec = codec->spec;
4335 codec_dbg(codec, "ca0132_select_out\n");
4337 snd_hda_power_up_pm(codec);
4342 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp);
4353 codec_dbg(codec, "ca0132_select_out speaker\n");
4356 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
4361 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);
4366 snd_hda_codec_write(codec, spec->out_pins[1], 0,
4368 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4370 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4372 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4376 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
4378 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
4381 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
4383 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
4386 codec_dbg(codec, "ca0132_select_out hp\n");
4389 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
4394 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);
4399 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4401 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4403 snd_hda_codec_write(codec, spec->out_pins[1], 0,
4405 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4409 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
4411 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
4414 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
4416 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
4421 snd_hda_power_down_pm(codec);
4426 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4427 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4428 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4430 static void ae5_mmio_select_out(struct hda_codec *codec)
4432 struct ca0132_spec *spec = codec->spec;
4442 ca0113_mmio_command_set(codec, out_cmds->group[i],
4447 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec)
4449 struct ca0132_spec *spec = codec->spec;
4461 err = dspio_set_uint_param(codec, 0x96,
4468 err = dspio_set_uint_param(codec, 0x96,
4473 err = dspio_set_uint_param(codec, 0x96,
4483 err = dspio_set_uint_param(codec, 0x96,
4492 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec,
4495 struct ca0132_spec *spec = codec->spec;
4505 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp);
4512 err = dspio_set_uint_param(codec, 0x96,
4525 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec,
4528 struct ca0132_spec *spec = codec->spec;
4541 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec)
4545 struct ca0132_spec *spec = codec->spec;
4549 ca0132_alt_select_out_get_quirk_data(codec, &quirk_data);
4555 ae5_mmio_select_out(codec);
4558 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0,
4566 snd_hda_codec_write(codec, codec->core.afg, 0,
4572 ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i],
4579 err = dspio_set_uint_param(codec,
4588 chipio_set_control_param(codec, 0x0d, out_info->dac2port);
4591 chipio_write(codec, out_info->chipio_write_addr,
4598 ae5_headphone_gain_set(codec, 2);
4600 zxr_headphone_gain_set(codec, 0);
4603 ae5_headphone_gain_set(codec,
4606 zxr_headphone_gain_set(codec,
4614 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid,
4619 pin_ctl = snd_hda_codec_read(codec, nid, 0,
4624 snd_hda_set_pin_ctl(codec, nid, pin_ctl);
4635 static int ca0132_alt_select_out(struct hda_codec *codec)
4637 struct ca0132_spec *spec = codec->spec;
4645 codec_dbg(codec, "%s\n", __func__);
4647 snd_hda_power_up_pm(codec);
4657 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) ||
4658 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp);
4670 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE);
4674 if (ca0132_alt_select_out_quirk_set(codec) < 0)
4679 codec_dbg(codec, "%s speaker\n", __func__);
4682 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4686 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0);
4688 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0);
4690 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0);
4692 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0);
4704 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
4710 codec_dbg(codec, "%s hp\n", __func__);
4711 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4715 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0);
4716 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0);
4717 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0);
4720 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp))
4722 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp))
4725 ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1);
4728 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE);
4730 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO);
4742 ca0132_effects_set(codec, X_BASS,
4746 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO);
4754 err = dspio_set_uint_param(codec, 0x96,
4760 err = ca0132_alt_surround_set_bass_redirection(codec,
4763 err = ca0132_alt_surround_set_bass_redirection(codec, 0);
4766 err = dspio_set_uint_param(codec, 0x96,
4772 err = ca0132_alt_set_full_range_speaker(codec);
4778 snd_hda_power_down_pm(codec);
4790 ca0132_alt_select_out(spec->codec);
4792 ca0132_select_out(spec->codec);
4794 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp);
4797 snd_hda_jack_report_sync(spec->codec);
4801 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4802 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4803 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4804 static int stop_mic1(struct hda_codec *codec);
4805 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4806 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4811 static int ca0132_set_vipsource(struct hda_codec *codec, int val)
4813 struct ca0132_spec *spec = codec->spec;
4822 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
4823 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4824 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4829 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4831 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4833 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);
4834 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);
4839 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4841 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4843 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);
4849 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val)
4851 struct ca0132_spec *spec = codec->spec;
4857 codec_dbg(codec, "%s\n", __func__);
4859 chipio_set_stream_control(codec, 0x03, 0);
4860 chipio_set_stream_control(codec, 0x04, 0);
4865 codec_dbg(codec, "%s: off.", __func__);
4866 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
4869 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4871 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4872 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4874 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
4886 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4889 codec_dbg(codec, "%s: on.", __func__);
4890 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);
4891 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);
4893 chipio_set_conn_rate(codec, 0x0F, SR_16_000);
4899 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4902 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4905 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);
4908 chipio_set_stream_control(codec, 0x03, 1);
4909 chipio_set_stream_control(codec, 0x04, 1);
4920 static int ca0132_select_mic(struct hda_codec *codec)
4922 struct ca0132_spec *spec = codec->spec;
4926 codec_dbg(codec, "ca0132_select_mic\n");
4928 snd_hda_power_up_pm(codec);
4933 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1);
4945 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000);
4946 ca0132_set_dmic(codec, 1);
4947 ca0132_mic_boost_set(codec, 0);
4949 ca0132_effects_set(codec, VOICE_FOCUS,
4954 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000);
4955 ca0132_set_dmic(codec, 0);
4956 ca0132_mic_boost_set(codec, spec->cur_mic_boost);
4958 ca0132_effects_set(codec, VOICE_FOCUS, 0);
4961 snd_hda_power_down_pm(codec);
4972 static int ca0132_alt_select_in(struct hda_codec *codec)
4974 struct ca0132_spec *spec = codec->spec;
4977 codec_dbg(codec, "%s\n", __func__);
4979 snd_hda_power_up_pm(codec);
4981 chipio_set_stream_control(codec, 0x03, 0);
4982 chipio_set_stream_control(codec, 0x04, 0);
4991 ca0113_mmio_gpio_set(codec, 0, false);
4998 r3di_gpio_mic_set(codec, R3DI_REAR_MIC);
5002 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
5006 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
5008 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2,
5010 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2,
5012 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO);
5019 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
5020 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
5022 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
5024 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5026 chipio_set_stream_control(codec, 0x03, 1);
5027 chipio_set_stream_control(codec, 0x04, 1);
5030 chipio_write(codec, 0x18B098, 0x0000000C);
5031 chipio_write(codec, 0x18B09C, 0x0000000C);
5034 chipio_write(codec, 0x18B098, 0x0000000C);
5035 chipio_write(codec, 0x18B09C, 0x000000CC);
5038 chipio_write(codec, 0x18B098, 0x0000000C);
5039 chipio_write(codec, 0x18B09C, 0x0000004C);
5044 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
5047 ca0132_mic_boost_set(codec, 0);
5051 ca0113_mmio_gpio_set(codec, 0, false);
5054 r3di_gpio_mic_set(codec, R3DI_REAR_MIC);
5057 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
5060 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f);
5061 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2,
5063 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2,
5065 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO);
5071 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
5072 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
5074 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
5080 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5085 chipio_write(codec, 0x18B098, 0x00000000);
5086 chipio_write(codec, 0x18B09C, 0x00000000);
5091 chipio_set_stream_control(codec, 0x03, 1);
5092 chipio_set_stream_control(codec, 0x04, 1);
5098 ca0113_mmio_gpio_set(codec, 0, true);
5099 ca0113_mmio_gpio_set(codec, 5, false);
5103 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC);
5107 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f);
5115 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
5116 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
5118 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
5120 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5122 chipio_set_stream_control(codec, 0x03, 1);
5123 chipio_set_stream_control(codec, 0x04, 1);
5127 chipio_write(codec, 0x18B098, 0x0000000C);
5128 chipio_write(codec, 0x18B09C, 0x000000CC);
5131 chipio_write(codec, 0x18B098, 0x0000000C);
5132 chipio_write(codec, 0x18B09C, 0x0000004C);
5137 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
5140 ca0132_cvoice_switch_set(codec);
5142 snd_hda_power_down_pm(codec);
5149 static bool ca0132_is_vnode_effective(struct hda_codec *codec,
5153 struct ca0132_spec *spec = codec->spec;
5177 static int ca0132_voicefx_set(struct hda_codec *codec, int enable)
5179 struct ca0132_spec *spec = codec->spec;
5190 dspio_set_uint_param(codec, ca0132_voicefx.mid,
5199 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val)
5201 struct ca0132_spec *spec = codec->spec;
5246 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
5265 dspio_set_uint_param(codec, 0x47, 0x00, tmp);
5274 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n",
5278 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid,
5290 static int ca0132_pe_switch_set(struct hda_codec *codec)
5292 struct ca0132_spec *spec = codec->spec;
5296 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n",
5300 ca0132_alt_select_out(codec);
5306 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
5312 static int stop_mic1(struct hda_codec *codec)
5314 struct ca0132_spec *spec = codec->spec;
5315 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0,
5318 snd_hda_codec_write(codec, spec->adcs[0], 0,
5325 static void resume_mic1(struct hda_codec *codec, unsigned int oldval)
5327 struct ca0132_spec *spec = codec->spec;
5330 snd_hda_codec_write(codec, spec->adcs[0], 0,
5338 static int ca0132_cvoice_switch_set(struct hda_codec *codec)
5340 struct ca0132_spec *spec = codec->spec;
5345 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n",
5352 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
5355 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0));
5358 oldval = stop_mic1(codec);
5360 ret |= ca0132_alt_set_vipsource(codec, 1);
5362 ret |= ca0132_set_vipsource(codec, 1);
5363 resume_mic1(codec, oldval);
5367 static int ca0132_mic_boost_set(struct hda_codec *codec, long val)
5369 struct ca0132_spec *spec = codec->spec;
5373 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
5376 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
5382 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val)
5384 struct ca0132_spec *spec = codec->spec;
5387 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
5392 static int ae5_headphone_gain_set(struct hda_codec *codec, long val)
5397 ca0113_mmio_command_set(codec, 0x48, 0x11 + i,
5406 static int zxr_headphone_gain_set(struct hda_codec *codec, long val)
5408 ca0113_mmio_gpio_set(codec, 1, val);
5416 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5421 struct ca0132_spec *spec = codec->spec;
5429 ca0132_alt_select_out(codec);
5431 ca0132_select_out(codec);
5440 ca0132_select_mic(codec);
5446 ca0132_alt_select_out(codec);
5448 ca0132_select_out(codec);
5453 ca0132_select_mic(codec);
5458 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
5464 mutex_lock(&codec->control_mutex);
5470 mutex_unlock(&codec->control_mutex);
5477 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec,
5480 snd_hda_power_up(codec);
5482 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ,
5485 snd_hda_power_down(codec);
5497 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid,
5511 snd_hda_power_up(codec);
5517 dspio_set_param(codec, ca0132_effects[i].mid, 0x20,
5526 dspio_set_param(codec, ca0132_effects[i].mid, 0x20,
5531 snd_hda_power_down(codec);
5539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5540 struct ca0132_spec *spec = codec->spec;
5555 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5556 struct ca0132_spec *spec = codec->spec;
5598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5599 struct ca0132_spec *spec = codec->spec;
5618 ca0132_alt_bass_redirection_xover_set(codec, *cur_val);
5620 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx);
5628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5629 struct ca0132_spec *spec = codec->spec;
5642 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx);
5675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5676 struct ca0132_spec *spec = codec->spec;
5685 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5686 struct ca0132_spec *spec = codec->spec;
5693 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n",
5699 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
5729 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5730 struct ca0132_spec *spec = codec->spec;
5739 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5740 struct ca0132_spec *spec = codec->spec;
5747 codec_dbg(codec, "ae5_headphone_gain: boost=%d\n",
5753 ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val);
5782 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5783 struct ca0132_spec *spec = codec->spec;
5792 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5793 struct ca0132_spec *spec = codec->spec;
5800 codec_dbg(codec, "ae5_sound_filter: %s\n",
5805 ca0113_mmio_command_set_type2(codec, 0x48, 0x07,
5832 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5833 struct ca0132_spec *spec = codec->spec;
5842 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5843 struct ca0132_spec *spec = codec->spec;
5857 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n",
5862 ca0132_alt_select_in(codec);
5884 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5885 struct ca0132_spec *spec = codec->spec;
5894 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5895 struct ca0132_spec *spec = codec->spec;
5903 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n",
5911 ca0132_alt_select_out(codec);
5935 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5936 struct ca0132_spec *spec = codec->spec;
5945 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5946 struct ca0132_spec *spec = codec->spec;
5953 codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n",
5959 ca0132_alt_select_out(codec);
5988 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5989 struct ca0132_spec *spec = codec->spec;
5998 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5999 struct ca0132_spec *spec = codec->spec;
6008 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n",
6028 dspio_set_uint_param(codec, ca0132_effects[idx].mid,
6052 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6053 struct ca0132_spec *spec = codec->spec;
6062 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6063 struct ca0132_spec *spec = codec->spec;
6071 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel,
6078 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid,
6109 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6110 struct ca0132_spec *spec = codec->spec;
6119 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6120 struct ca0132_spec *spec = codec->spec;
6127 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n",
6135 err = dspio_set_uint_param(codec, ca0132_voicefx.mid,
6145 ca0132_voicefx_set(codec, (sel ? 1 : 0));
6154 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6155 struct ca0132_spec *spec = codec->spec;
6206 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6207 struct ca0132_spec *spec = codec->spec;
6213 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n",
6216 snd_hda_power_up(codec);
6234 changed = ca0132_pe_switch_set(codec);
6241 changed = ca0132_cvoice_switch_set(codec);
6249 changed = ca0132_effects_set(codec, nid, *valp);
6258 changed = ca0132_mic_boost_set(codec, *valp);
6262 changed = ca0132_mic_boost_set(codec, *valp);
6271 changed = zxr_headphone_gain_set(codec, *valp);
6281 ca0132_alt_set_full_range_speaker(codec);
6289 ca0132_alt_surround_set_bass_redirection(codec, *valp);
6295 snd_hda_power_down(codec);
6307 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid)
6309 struct ca0132_spec *spec = codec->spec;
6320 dspio_set_uint_param(codec,
6327 dspio_set_uint_param(codec,
6332 dspio_set_uint_param(codec,
6340 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6341 struct ca0132_spec *spec = codec->spec;
6352 mutex_lock(&codec->control_mutex);
6357 mutex_unlock(&codec->control_mutex);
6362 mutex_lock(&codec->control_mutex);
6367 mutex_unlock(&codec->control_mutex);
6378 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6379 struct ca0132_spec *spec = codec->spec;
6399 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6400 struct ca0132_spec *spec = codec->spec;
6419 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
6424 snd_hda_power_up(codec);
6425 mutex_lock(&codec->control_mutex);
6431 mutex_unlock(&codec->control_mutex);
6432 snd_hda_power_down(codec);
6446 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6447 struct ca0132_spec *spec = codec->spec;
6473 snd_hda_power_up(codec);
6474 ca0132_alt_dsp_volume_put(codec, vnid);
6475 mutex_lock(&codec->control_mutex);
6477 mutex_unlock(&codec->control_mutex);
6478 snd_hda_power_down(codec);
6486 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
6487 struct ca0132_spec *spec = codec->spec;
6498 mutex_lock(&codec->control_mutex);
6503 mutex_unlock(&codec->control_mutex);
6508 mutex_lock(&codec->control_mutex);
6513 mutex_unlock(&codec->control_mutex);
6522 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid,
6549 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
6557 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid,
6560 struct ca0132_spec *spec = codec->spec;
6573 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
6576 static int add_voicefx(struct hda_codec *codec)
6584 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec));
6588 static int add_ca0132_alt_eq_presets(struct hda_codec *codec)
6596 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM,
6597 snd_ctl_new1(&knew, codec));
6605 static int ca0132_alt_add_svm_enum(struct hda_codec *codec)
6613 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM,
6614 snd_ctl_new1(&knew, codec));
6622 static int ca0132_alt_add_output_enum(struct hda_codec *codec)
6630 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM,
6631 snd_ctl_new1(&knew, codec));
6639 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec)
6647 return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM,
6648 snd_ctl_new1(&knew, codec));
6656 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec)
6662 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT,
6663 snd_ctl_new1(&knew, codec));
6666 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec)
6672 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR,
6673 snd_ctl_new1(&knew, codec));
6682 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec)
6694 return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER,
6695 snd_ctl_new1(&knew, codec));
6698 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec)
6705 return snd_hda_ctl_add(codec, BASS_REDIRECTION,
6706 snd_ctl_new1(&knew, codec));
6714 static int ca0132_alt_add_input_enum(struct hda_codec *codec)
6722 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM,
6723 snd_ctl_new1(&knew, codec));
6730 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec)
6738 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM,
6739 snd_ctl_new1(&knew, codec));
6748 static int ae5_add_headphone_gain_enum(struct hda_codec *codec)
6756 return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM,
6757 snd_ctl_new1(&knew, codec));
6765 static int ae5_add_sound_filter_enum(struct hda_codec *codec)
6773 return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM,
6774 snd_ctl_new1(&knew, codec));
6777 static int zxr_add_headphone_gain_switch(struct hda_codec *codec)
6783 return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN,
6784 snd_ctl_new1(&knew, codec));
6814 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec)
6819 list_for_each_entry(pcm, &codec->pcm_list_head, list) {
6831 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!");
6907 static int ca0132_build_controls(struct hda_codec *codec)
6909 struct ca0132_spec *spec = codec->spec;
6915 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
6921 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT,
6923 snd_hda_add_vmaster(codec, "Master Playback Volume",
6926 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
6946 err = add_fx_switch(codec, ca0132_effects[i].nid,
6953 * If codec has use_alt_controls set to true, add effect level sliders,
6958 err = ca0132_alt_add_svm_enum(codec);
6962 err = add_ca0132_alt_eq_presets(codec);
6966 err = add_fx_switch(codec, PLAY_ENHANCEMENT,
6971 err = add_fx_switch(codec, CRYSTAL_VOICE,
6978 err = ca0132_alt_add_effect_slider(codec,
6986 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER,
6992 err = add_fx_switch(codec, PLAY_ENHANCEMENT,
6997 err = add_fx_switch(codec, CRYSTAL_VOICE,
7002 err = add_voicefx(codec);
7007 * If the codec uses alt_functions, you need the enumerated controls
7012 err = ca0132_alt_add_output_enum(codec);
7015 err = ca0132_alt_add_speaker_channel_cfg_enum(codec);
7018 err = ca0132_alt_add_front_full_range_switch(codec);
7021 err = ca0132_alt_add_rear_full_range_switch(codec);
7024 err = ca0132_alt_add_bass_redirection_crossover(codec);
7027 err = ca0132_alt_add_bass_redirection_switch(codec);
7030 err = ca0132_alt_add_mic_boost_enum(codec);
7038 err = ca0132_alt_add_input_enum(codec);
7047 err = ae5_add_headphone_gain_enum(codec);
7050 err = ae5_add_sound_filter_enum(codec);
7055 err = zxr_add_headphone_gain_switch(codec);
7064 add_tuning_ctls(codec);
7067 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
7072 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
7076 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout);
7083 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
7089 ca0132_alt_add_chmap_ctls(codec);
7094 static int dbpro_build_controls(struct hda_codec *codec)
7096 struct ca0132_spec *spec = codec->spec;
7100 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
7107 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
7158 static int ca0132_build_pcms(struct hda_codec *codec)
7160 struct ca0132_spec *spec = codec->spec;
7163 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog");
7181 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2");
7190 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear");
7200 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital");
7218 static int dbpro_build_pcms(struct hda_codec *codec)
7220 struct ca0132_spec *spec = codec->spec;
7223 info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog");
7234 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital");
7252 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac)
7255 snd_hda_set_pin_ctl(codec, pin, PIN_HP);
7256 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
7257 snd_hda_codec_write(codec, pin, 0,
7261 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP))
7262 snd_hda_codec_write(codec, dac, 0,
7266 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc)
7269 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80);
7270 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
7271 snd_hda_codec_write(codec, pin, 0,
7275 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) {
7276 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
7280 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
7282 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
7287 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir)
7291 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ?
7293 snd_hda_override_amp_caps(codec, nid, dir, caps);
7299 static void ca0132_set_dmic(struct hda_codec *codec, int enable)
7301 struct ca0132_spec *spec = codec->spec;
7306 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable);
7308 oldval = stop_mic1(codec);
7309 ca0132_set_vipsource(codec, 0);
7313 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7317 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7321 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1);
7325 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7330 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7334 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0);
7336 ca0132_set_vipsource(codec, 1);
7337 resume_mic1(codec, oldval);
7343 static void ca0132_init_dmic(struct hda_codec *codec)
7345 struct ca0132_spec *spec = codec->spec;
7358 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7368 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7384 snd_hda_codec_write(codec, spec->input_pins[0], 0,
7391 static void ca0132_init_analog_mic2(struct hda_codec *codec)
7393 struct ca0132_spec *spec = codec->spec;
7396 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7398 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7400 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7402 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7404 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7406 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7411 static void ca0132_refresh_widget_caps(struct hda_codec *codec)
7413 struct ca0132_spec *spec = codec->spec;
7416 codec_dbg(codec, "ca0132_refresh_widget_caps.\n");
7417 snd_hda_codec_update_widgets(codec);
7420 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT);
7423 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT);
7426 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT);
7427 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT);
7452 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec)
7454 struct ca0132_spec *spec = codec->spec;
7475 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp);
7480 dspio_set_uint_param(codec, 0x96, i, tmp);
7485 dspio_set_uint_param(codec, 0x96, i, tmp);
7489 dspio_set_uint_param(codec, 0x96,
7497 static void ca0132_alt_create_dummy_stream(struct hda_codec *codec)
7499 struct ca0132_spec *spec = codec->spec;
7505 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id,
7508 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
7514 static void ca0132_alt_init_analog_mics(struct hda_codec *codec)
7516 struct ca0132_spec *spec = codec->spec;
7520 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
7521 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
7523 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
7527 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7530 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000);
7531 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000);
7533 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
7535 dspio_set_uint_param(codec, 0x80, 0x01, tmp);
7544 static void sbz_connect_streams(struct hda_codec *codec)
7546 struct ca0132_spec *spec = codec->spec;
7550 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n");
7552 chipio_set_stream_channels(codec, 0x0C, 6);
7553 chipio_set_stream_control(codec, 0x0C, 1);
7556 chipio_write_no_mutex(codec, 0x18a020, 0x00000043);
7559 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91);
7560 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000);
7561 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000);
7562 chipio_set_stream_channels(codec, 0x14, 2);
7563 chipio_set_stream_control(codec, 0x14, 1);
7565 codec_dbg(codec, "Connect Streams exited, mutex released.\n");
7576 static void sbz_chipio_startup_data(struct hda_codec *codec)
7578 struct ca0132_spec *spec = codec->spec;
7581 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n");
7584 chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0);
7585 chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1);
7586 chipio_write_no_mutex(codec, 0x190068, 0x0001fac6);
7587 chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7);
7589 chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
7591 chipio_set_stream_channels(codec, 0x0C, 6);
7592 chipio_set_stream_control(codec, 0x0C, 1);
7595 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0);
7596 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1);
7597 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2);
7598 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3);
7599 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4);
7600 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5);
7601 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6);
7602 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7);
7603 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8);
7604 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9);
7605 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca);
7606 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb);
7608 chipio_write_no_mutex(codec, 0x190038, 0x000140c2);
7609 chipio_write_no_mutex(codec, 0x19003c, 0x000141c3);
7610 chipio_write_no_mutex(codec, 0x190040, 0x000150c4);
7611 chipio_write_no_mutex(codec, 0x190044, 0x000151c5);
7612 chipio_write_no_mutex(codec, 0x190050, 0x000142c8);
7613 chipio_write_no_mutex(codec, 0x190054, 0x000143c9);
7614 chipio_write_no_mutex(codec, 0x190058, 0x000152ca);
7615 chipio_write_no_mutex(codec, 0x19005c, 0x000153cb);
7617 chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
7619 codec_dbg(codec, "Startup Data exited, mutex released.\n");
7627 static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec)
7629 struct ca0132_spec *spec = codec->spec;
7642 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
7644 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
7646 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
7648 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
7650 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
7652 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
7657 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
7659 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
7661 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
7663 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
7665 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
7674 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec)
7676 struct ca0132_spec *spec = codec->spec;
7679 chipio_set_stream_control(codec, 0x03, 0);
7680 chipio_set_stream_control(codec, 0x04, 0);
7682 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
7683 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
7686 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
7688 chipio_set_stream_control(codec, 0x03, 1);
7689 chipio_set_stream_control(codec, 0x04, 1);
7693 chipio_write(codec, 0x18b098, 0x0000000c);
7694 chipio_write(codec, 0x18b09C, 0x0000000c);
7697 chipio_write(codec, 0x18b098, 0x0000000c);
7698 chipio_write(codec, 0x18b09c, 0x0000004c);
7705 static void ae5_post_dsp_register_set(struct hda_codec *codec)
7707 struct ca0132_spec *spec = codec->spec;
7709 chipio_8051_write_direct(codec, 0x93, 0x10);
7710 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7712 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7728 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f);
7729 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f);
7730 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
7733 static void ae5_post_dsp_param_setup(struct hda_codec *codec)
7740 chipio_set_control_param(codec, 3, 0);
7745 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1);
7747 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83);
7748 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
7750 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7752 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7754 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7758 static void ae5_post_dsp_pll_setup(struct hda_codec *codec)
7760 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7762 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7765 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7767 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7770 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7772 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7775 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7777 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7780 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7782 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7786 static void ae5_post_dsp_stream_setup(struct hda_codec *codec)
7788 struct ca0132_spec *spec = codec->spec;
7792 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81);
7794 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
7796 chipio_set_stream_channels(codec, 0x0C, 6);
7797 chipio_set_stream_control(codec, 0x0C, 1);
7799 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0);
7801 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0);
7802 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);
7803 chipio_set_stream_channels(codec, 0x18, 6);
7804 chipio_set_stream_control(codec, 0x18, 1);
7806 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);
7808 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7810 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7813 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80);
7818 static void ae5_post_dsp_startup_data(struct hda_codec *codec)
7820 struct ca0132_spec *spec = codec->spec;
7824 chipio_write_no_mutex(codec, 0x189000, 0x0001f101);
7825 chipio_write_no_mutex(codec, 0x189004, 0x0001f101);
7826 chipio_write_no_mutex(codec, 0x189024, 0x00014004);
7827 chipio_write_no_mutex(codec, 0x189028, 0x0002000f);
7829 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05);
7830 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);
7831 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12);
7832 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00);
7833 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48);
7834 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05);
7835 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
7836 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
7837 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
7838 ca0113_mmio_gpio_set(codec, 0, true);
7839 ca0113_mmio_gpio_set(codec, 1, true);
7840 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80);
7842 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012);
7844 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
7845 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
7855 static void ae7_post_dsp_setup_ports(struct hda_codec *codec)
7857 struct ca0132_spec *spec = codec->spec;
7862 chipio_set_stream_channels(codec, 0x0c, 6);
7863 chipio_set_stream_control(codec, 0x0c, 1);
7868 chipio_write_no_mutex(codec, addr, ae7_port_set_data[i]);
7877 chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
7879 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
7880 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40);
7881 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00);
7882 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00);
7883 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff);
7884 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff);
7885 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff);
7886 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f);
7891 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec)
7893 struct ca0132_spec *spec = codec->spec;
7897 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81);
7898 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);
7900 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);
7901 chipio_set_stream_channels(codec, 0x0c, 6);
7902 chipio_set_stream_control(codec, 0x0c, 1);
7904 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);
7905 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0);
7907 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);
7908 chipio_set_stream_channels(codec, 0x18, 6);
7909 chipio_set_stream_control(codec, 0x18, 1);
7911 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);
7916 static void ae7_post_dsp_pll_setup(struct hda_codec *codec)
7927 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7929 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7934 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec)
7936 struct ca0132_spec *spec = codec->spec;
7947 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7949 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7952 chipio_write_no_mutex(codec, 0x189000, 0x0001f101);
7953 chipio_write_no_mutex(codec, 0x189004, 0x0001f101);
7954 chipio_write_no_mutex(codec, 0x189024, 0x00014004);
7955 chipio_write_no_mutex(codec, 0x189028, 0x0002000f);
7957 ae7_post_dsp_pll_setup(codec);
7958 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);
7961 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]);
7963 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
7964 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
7965 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
7967 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56);
7968 chipio_set_stream_channels(codec, 0x21, 2);
7969 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000);
7971 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09);
7977 chipio_set_control_param_no_mutex(codec, 0x20, 0x21);
7979 chipio_write_no_mutex(codec, 0x18b038, 0x00000088);
7990 ca0113_mmio_gpio_set(codec, 0, 1);
7991 ca0113_mmio_gpio_set(codec, 1, 1);
7993 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
7994 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000);
7995 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);
7996 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);
7998 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);
7999 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0);
8001 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);
8002 chipio_set_stream_channels(codec, 0x18, 6);
8008 ae7_post_dsp_pll_setup(codec);
8009 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);
8019 static void ae7_post_dsp_asi_setup(struct hda_codec *codec)
8021 chipio_8051_write_direct(codec, 0x93, 0x10);
8023 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
8025 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
8028 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
8029 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
8031 chipio_set_control_param(codec, 3, 3);
8032 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1);
8034 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83);
8035 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
8036 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00);
8038 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
8040 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
8042 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
8045 ae7_post_dsp_pll_setup(codec);
8046 ae7_post_dsp_asi_stream_setup(codec);
8048 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
8050 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
8053 ae7_post_dsp_asi_setup_ports(codec);
8059 static void ca0132_setup_defaults(struct hda_codec *codec)
8061 struct ca0132_spec *spec = codec->spec;
8073 dspio_set_uint_param(codec, ca0132_effects[idx].mid,
8081 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8084 dspio_set_uint_param(codec, 0x8f, 0x01, tmp);
8088 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
8089 dspio_set_uint_param(codec, 0x80, 0x01, tmp);
8093 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
8097 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8104 static void r3d_setup_defaults(struct hda_codec *codec)
8106 struct ca0132_spec *spec = codec->spec;
8114 ca0132_alt_dsp_scp_startup(codec);
8115 ca0132_alt_init_analog_mics(codec);
8119 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8123 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8124 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8127 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8130 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED);
8134 ca0113_mmio_gpio_set(codec, 2, false);
8135 ca0113_mmio_gpio_set(codec, 4, true);
8142 dspio_set_uint_param(codec,
8154 static void sbz_setup_defaults(struct hda_codec *codec)
8156 struct ca0132_spec *spec = codec->spec;
8164 ca0132_alt_dsp_scp_startup(codec);
8165 ca0132_alt_init_analog_mics(codec);
8166 sbz_connect_streams(codec);
8167 sbz_chipio_startup_data(codec);
8169 chipio_set_stream_control(codec, 0x03, 1);
8170 chipio_set_stream_control(codec, 0x04, 1);
8177 dspio_set_uint_param(codec, 0x37, 0x08, tmp);
8178 dspio_set_uint_param(codec, 0x37, 0x10, tmp);
8182 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8186 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8187 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8190 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8192 ca0132_alt_dsp_initial_mic_setup(codec);
8198 dspio_set_uint_param(codec,
8205 ca0132_alt_init_speaker_tuning(codec);
8207 ca0132_alt_create_dummy_stream(codec);
8213 static void ae5_setup_defaults(struct hda_codec *codec)
8215 struct ca0132_spec *spec = codec->spec;
8223 ca0132_alt_dsp_scp_startup(codec);
8224 ca0132_alt_init_analog_mics(codec);
8225 chipio_set_stream_control(codec, 0x03, 1);
8226 chipio_set_stream_control(codec, 0x04, 1);
8230 dspio_set_uint_param(codec, 0x96, 0x29, tmp);
8231 dspio_set_uint_param(codec, 0x96, 0x2a, tmp);
8232 dspio_set_uint_param(codec, 0x80, 0x0d, tmp);
8233 dspio_set_uint_param(codec, 0x80, 0x0e, tmp);
8235 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
8236 ca0113_mmio_gpio_set(codec, 0, false);
8237 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
8241 dspio_set_uint_param(codec, 0x37, 0x08, tmp);
8242 dspio_set_uint_param(codec, 0x37, 0x10, tmp);
8246 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8250 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8251 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8254 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8256 ca0132_alt_dsp_initial_mic_setup(codec);
8257 ae5_post_dsp_register_set(codec);
8258 ae5_post_dsp_param_setup(codec);
8259 ae5_post_dsp_pll_setup(codec);
8260 ae5_post_dsp_stream_setup(codec);
8261 ae5_post_dsp_startup_data(codec);
8267 dspio_set_uint_param(codec,
8274 ca0132_alt_init_speaker_tuning(codec);
8276 ca0132_alt_create_dummy_stream(codec);
8282 static void ae7_setup_defaults(struct hda_codec *codec)
8284 struct ca0132_spec *spec = codec->spec;
8292 ca0132_alt_dsp_scp_startup(codec);
8293 ca0132_alt_init_analog_mics(codec);
8294 ae7_post_dsp_setup_ports(codec);
8297 dspio_set_uint_param(codec, 0x96,
8299 dspio_set_uint_param(codec, 0x96,
8302 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
8305 dspio_set_uint_param(codec, 0x80, 0x0d, tmp);
8306 dspio_set_uint_param(codec, 0x80, 0x0e, tmp);
8308 ca0113_mmio_gpio_set(codec, 0, false);
8312 dspio_set_uint_param(codec, 0x37, 0x08, tmp);
8313 dspio_set_uint_param(codec, 0x37, 0x10, tmp);
8317 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
8321 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
8322 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8325 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
8326 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);
8332 ca0132_alt_init_analog_mics(codec);
8334 ae7_post_dsp_asi_setup(codec);
8340 ca0113_mmio_gpio_set(codec, 0, true);
8341 ca0113_mmio_gpio_set(codec, 1, true);
8344 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04);
8345 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04);
8346 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80);
8352 dspio_set_uint_param(codec,
8359 ca0132_alt_init_speaker_tuning(codec);
8361 ca0132_alt_create_dummy_stream(codec);
8367 static void ca0132_init_flags(struct hda_codec *codec)
8369 struct ca0132_spec *spec = codec->spec;
8372 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1);
8373 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1);
8374 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1);
8375 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1);
8376 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1);
8377 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
8378 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0);
8379 chipio_set_control_flag(codec,
8381 chipio_set_control_flag(codec,
8384 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
8385 chipio_set_control_flag(codec,
8387 chipio_set_control_flag(codec,
8389 chipio_set_control_flag(codec,
8391 chipio_set_control_flag(codec,
8393 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1);
8400 static void ca0132_init_params(struct hda_codec *codec)
8402 struct ca0132_spec *spec = codec->spec;
8405 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8406 chipio_set_conn_rate(codec, 0x0B, SR_48_000);
8407 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0);
8408 chipio_set_control_param(codec, 0, 0);
8409 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
8412 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6);
8413 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6);
8416 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k)
8418 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k);
8419 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k);
8420 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k);
8421 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k);
8422 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k);
8423 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k);
8425 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
8426 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
8427 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
8430 static bool ca0132_download_dsp_images(struct hda_codec *codec)
8433 struct ca0132_spec *spec = codec->spec;
8446 codec->card->dev) != 0)
8447 codec_dbg(codec, "Desktop firmware not found.");
8449 codec_dbg(codec, "Desktop firmware selected.");
8453 codec->card->dev) != 0)
8454 codec_dbg(codec, "Recon3Di alt firmware not detected.");
8456 codec_dbg(codec, "Recon3Di firmware selected.");
8463 * exists for your particular codec.
8466 codec_dbg(codec, "Default firmware selected.");
8468 codec->card->dev) != 0)
8473 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) {
8474 codec_err(codec, "ca0132 DSP load image failed\n");
8478 dsp_loaded = dspload_wait_loaded(codec);
8486 static void ca0132_download_dsp(struct hda_codec *codec)
8488 struct ca0132_spec *spec = codec->spec;
8497 chipio_enable_clocks(codec);
8501 if (!ca0132_download_dsp_images(codec))
8509 ca0132_set_dsp_msr(codec, true);
8512 static void ca0132_process_dsp_response(struct hda_codec *codec,
8515 struct ca0132_spec *spec = codec->spec;
8517 codec_dbg(codec, "ca0132_process_dsp_response\n");
8518 snd_hda_power_up_pm(codec);
8520 if (dspio_get_response_data(codec) >= 0)
8524 dspio_clear_response_queue(codec);
8525 snd_hda_power_down_pm(codec);
8528 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
8530 struct ca0132_spec *spec = codec->spec;
8536 tbl = snd_hda_jack_tbl_get(codec, cb->nid);
8542 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
8544 struct ca0132_spec *spec = codec->spec;
8547 ca0132_alt_select_in(codec);
8549 ca0132_select_mic(codec);
8552 static void ca0132_init_unsol(struct hda_codec *codec)
8554 struct ca0132_spec *spec = codec->spec;
8555 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback);
8556 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1,
8558 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP,
8562 snd_hda_jack_detect_enable_callback(codec,
8641 static void ca0132_init_chip(struct hda_codec *codec)
8643 struct ca0132_spec *spec = codec->spec;
8702 ca0132_init_tuning_defaults(codec);
8710 static void r3di_gpio_shutdown(struct hda_codec *codec)
8712 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00);
8718 static void sbz_region2_exit(struct hda_codec *codec)
8720 struct ca0132_spec *spec = codec->spec;
8728 ca0113_mmio_gpio_set(codec, 0, false);
8729 ca0113_mmio_gpio_set(codec, 1, false);
8730 ca0113_mmio_gpio_set(codec, 4, true);
8731 ca0113_mmio_gpio_set(codec, 5, false);
8732 ca0113_mmio_gpio_set(codec, 7, false);
8735 static void sbz_set_pin_ctl_default(struct hda_codec *codec)
8740 snd_hda_codec_write(codec, 0x11, 0,
8744 snd_hda_codec_write(codec, pins[i], 0,
8748 static void ca0132_clear_unsolicited(struct hda_codec *codec)
8754 snd_hda_codec_write(codec, pins[i], 0,
8760 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir,
8764 snd_hda_codec_write(codec, 0x01, 0,
8767 snd_hda_codec_write(codec, 0x01, 0,
8771 snd_hda_codec_write(codec, 0x01, 0,
8775 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec)
8781 snd_hda_codec_write(codec, pins[i], 0,
8785 static void sbz_exit_chip(struct hda_codec *codec)
8787 chipio_set_stream_control(codec, 0x03, 0);
8788 chipio_set_stream_control(codec, 0x04, 0);
8791 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1);
8792 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05);
8793 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01);
8795 chipio_set_stream_control(codec, 0x14, 0);
8796 chipio_set_stream_control(codec, 0x0C, 0);
8798 chipio_set_conn_rate(codec, 0x41, SR_192_000);
8799 chipio_set_conn_rate(codec, 0x91, SR_192_000);
8801 chipio_write(codec, 0x18a020, 0x00000083);
8803 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03);
8804 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07);
8805 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06);
8807 chipio_set_stream_control(codec, 0x0C, 0);
8809 chipio_set_control_param(codec, 0x0D, 0x24);
8811 ca0132_clear_unsolicited(codec);
8812 sbz_set_pin_ctl_default(codec);
8814 snd_hda_codec_write(codec, 0x0B, 0,
8817 sbz_region2_exit(codec);
8820 static void r3d_exit_chip(struct hda_codec *codec)
8822 ca0132_clear_unsolicited(codec);
8823 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
8824 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b);
8827 static void ae5_exit_chip(struct hda_codec *codec)
8829 chipio_set_stream_control(codec, 0x03, 0);
8830 chipio_set_stream_control(codec, 0x04, 0);
8832 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
8833 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
8834 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
8835 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
8836 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);
8837 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00);
8838 ca0113_mmio_gpio_set(codec, 0, false);
8839 ca0113_mmio_gpio_set(codec, 1, false);
8841 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
8842 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
8844 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
8846 chipio_set_stream_control(codec, 0x18, 0);
8847 chipio_set_stream_control(codec, 0x0c, 0);
8849 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83);
8852 static void ae7_exit_chip(struct hda_codec *codec)
8854 chipio_set_stream_control(codec, 0x18, 0);
8855 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8);
8856 chipio_set_stream_channels(codec, 0x21, 0);
8857 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09);
8858 chipio_set_control_param(codec, 0x20, 0x01);
8860 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);
8862 chipio_set_stream_control(codec, 0x18, 0);
8863 chipio_set_stream_control(codec, 0x0c, 0);
8865 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);
8866 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83);
8867 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
8868 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);
8869 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00);
8870 ca0113_mmio_gpio_set(codec, 0, false);
8871 ca0113_mmio_gpio_set(codec, 1, false);
8872 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
8874 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
8875 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
8878 static void zxr_exit_chip(struct hda_codec *codec)
8880 chipio_set_stream_control(codec, 0x03, 0);
8881 chipio_set_stream_control(codec, 0x04, 0);
8882 chipio_set_stream_control(codec, 0x14, 0);
8883 chipio_set_stream_control(codec, 0x0C, 0);
8885 chipio_set_conn_rate(codec, 0x41, SR_192_000);
8886 chipio_set_conn_rate(codec, 0x91, SR_192_000);
8888 chipio_write(codec, 0x18a020, 0x00000083);
8890 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
8891 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
8893 ca0132_clear_unsolicited(codec);
8894 sbz_set_pin_ctl_default(codec);
8895 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00);
8897 ca0113_mmio_gpio_set(codec, 5, false);
8898 ca0113_mmio_gpio_set(codec, 2, false);
8899 ca0113_mmio_gpio_set(codec, 3, false);
8900 ca0113_mmio_gpio_set(codec, 0, false);
8901 ca0113_mmio_gpio_set(codec, 4, true);
8902 ca0113_mmio_gpio_set(codec, 0, true);
8903 ca0113_mmio_gpio_set(codec, 5, true);
8904 ca0113_mmio_gpio_set(codec, 2, false);
8905 ca0113_mmio_gpio_set(codec, 3, false);
8908 static void ca0132_exit_chip(struct hda_codec *codec)
8912 if (dspload_is_loaded(codec))
8913 dsp_reset(codec);
8924 static void sbz_dsp_startup_check(struct hda_codec *codec)
8926 struct ca0132_spec *spec = codec->spec;
8939 chipio_read(codec, cur_address, &dsp_data_check[i]);
8947 codec_dbg(codec, "Startup Check: %d ", failure);
8949 codec_info(codec, "DSP not initialized properly. Attempting to fix.");
8956 codec_info(codec, "Reloading... Tries left: %d", reload);
8957 sbz_exit_chip(codec);
8959 codec->patch_ops.init(codec);
8962 chipio_read(codec, cur_address, &dsp_data_check[i]);
8973 codec_info(codec, "DSP fixed.");
8978 codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to clear the internal memory.");
8989 static void ca0132_alt_vol_setup(struct hda_codec *codec)
8991 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00);
8992 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00);
8993 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00);
8994 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00);
8995 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00);
8996 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00);
8997 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00);
8998 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00);
9004 static void sbz_pre_dsp_setup(struct hda_codec *codec)
9006 struct ca0132_spec *spec = codec->spec;
9011 chipio_write(codec, 0x18b0a4, 0x000000c2);
9013 snd_hda_codec_write(codec, 0x11, 0,
9017 static void r3d_pre_dsp_setup(struct hda_codec *codec)
9019 chipio_write(codec, 0x18b0a4, 0x000000c2);
9021 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9023 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9025 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9028 snd_hda_codec_write(codec, 0x11, 0,
9032 static void r3di_pre_dsp_setup(struct hda_codec *codec)
9034 chipio_write(codec, 0x18b0a4, 0x000000c2);
9036 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9038 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9040 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9043 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9045 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9047 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9049 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9052 snd_hda_codec_write(codec, 0x11, 0,
9096 static void ca0132_mmio_init_sbz(struct hda_codec *codec)
9098 struct ca0132_spec *spec = codec->spec;
9146 static void ca0132_mmio_init_ae5(struct hda_codec *codec)
9148 struct ca0132_spec *spec = codec->spec;
9178 static void ca0132_mmio_init(struct hda_codec *codec)
9180 struct ca0132_spec *spec = codec->spec;
9186 ca0132_mmio_init_sbz(codec);
9189 ca0132_mmio_init_ae5(codec);
9208 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9211 static void ae5_register_set(struct hda_codec *codec)
9213 struct ca0132_spec *spec = codec->spec;
9221 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9223 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9227 chipio_8051_write_direct(codec, 0x93, 0x10);
9228 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9230 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9259 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);
9260 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);
9262 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f);
9265 chipio_8051_write_direct(codec, 0x90, 0x00);
9266 chipio_8051_write_direct(codec, 0x90, 0x10);
9269 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);
9271 chipio_write(codec, 0x18b0a4, 0x000000c2);
9273 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00);
9274 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00);
9282 static void ca0132_alt_init(struct hda_codec *codec)
9284 struct ca0132_spec *spec = codec->spec;
9286 ca0132_alt_vol_setup(codec);
9290 codec_dbg(codec, "SBZ alt_init");
9291 ca0132_gpio_init(codec);
9292 sbz_pre_dsp_setup(codec);
9293 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9294 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9297 codec_dbg(codec, "R3DI alt_init");
9298 ca0132_gpio_init(codec);
9299 ca0132_gpio_setup(codec);
9300 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING);
9301 r3di_pre_dsp_setup(codec);
9302 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9303 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4);
9306 r3d_pre_dsp_setup(codec);
9307 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9308 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9311 ca0132_gpio_init(codec);
9312 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9314 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9316 chipio_write(codec, 0x18b030, 0x00000020);
9317 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9318 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9319 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
9322 ca0132_gpio_init(codec);
9323 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9325 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9327 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9328 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9329 chipio_write(codec, 0x18b008, 0x000000f8);
9330 chipio_write(codec, 0x18b008, 0x000000f0);
9331 chipio_write(codec, 0x18b030, 0x00000020);
9332 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);
9335 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9336 snd_hda_sequence_write(codec, spec->desktop_init_verbs);
9343 static int ca0132_init(struct hda_codec *codec)
9345 struct ca0132_spec *spec = codec->spec;
9352 * there's only two reasons for it. One, the codec has awaken from a
9361 dsp_loaded = dspload_is_loaded(codec);
9367 sbz_dsp_startup_check(codec);
9377 ca0132_mmio_init(codec);
9379 snd_hda_power_up_pm(codec);
9382 ae5_register_set(codec);
9384 ca0132_init_unsol(codec);
9385 ca0132_init_params(codec);
9386 ca0132_init_flags(codec);
9388 snd_hda_sequence_write(codec, spec->base_init_verbs);
9391 ca0132_alt_init(codec);
9393 ca0132_download_dsp(codec);
9395 ca0132_refresh_widget_caps(codec);
9400 r3d_setup_defaults(codec);
9404 sbz_setup_defaults(codec);
9407 ae5_setup_defaults(codec);
9410 ae7_setup_defaults(codec);
9413 ca0132_setup_defaults(codec);
9414 ca0132_init_analog_mic2(codec);
9415 ca0132_init_dmic(codec);
9420 init_output(codec, spec->out_pins[i], spec->dacs[0]);
9422 init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
9425 init_input(codec, spec->input_pins[i], spec->adcs[i]);
9427 init_input(codec, cfg->dig_in_pin, spec->dig_in);
9430 snd_hda_sequence_write(codec, spec->chip_init_verbs);
9431 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9433 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
9438 ca0132_gpio_setup(codec);
9440 snd_hda_sequence_write(codec, spec->spec_init_verbs);
9442 ca0132_alt_select_out(codec);
9443 ca0132_alt_select_in(codec);
9445 ca0132_select_out(codec);
9446 ca0132_select_mic(codec);
9449 snd_hda_jack_report_sync(codec);
9457 ca0132_pe_switch_set(codec);
9460 snd_hda_power_down_pm(codec);
9465 static int dbpro_init(struct hda_codec *codec)
9467 struct ca0132_spec *spec = codec->spec;
9471 init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
9472 init_input(codec, cfg->dig_in_pin, spec->dig_in);
9475 init_input(codec, spec->input_pins[i], spec->adcs[i]);
9480 static void ca0132_free(struct hda_codec *codec)
9482 struct ca0132_spec *spec = codec->spec;
9485 snd_hda_power_up(codec);
9488 sbz_exit_chip(codec);
9491 zxr_exit_chip(codec);
9494 r3d_exit_chip(codec);
9497 ae5_exit_chip(codec);
9500 ae7_exit_chip(codec);
9503 r3di_gpio_shutdown(codec);
9509 snd_hda_sequence_write(codec, spec->base_exit_verbs);
9510 ca0132_exit_chip(codec);
9512 snd_hda_power_down(codec);
9515 pci_iounmap(codec->bus->pci, spec->mem_base);
9518 kfree(codec->spec);
9521 static void dbpro_free(struct hda_codec *codec)
9523 struct ca0132_spec *spec = codec->spec;
9525 zxr_dbpro_power_state_shutdown(codec);
9528 kfree(codec->spec);
9531 static void ca0132_reboot_notify(struct hda_codec *codec)
9533 codec->patch_ops.free(codec);
9537 static int ca0132_suspend(struct hda_codec *codec)
9539 struct ca0132_spec *spec = codec->spec;
9565 static void ca0132_config(struct hda_codec *codec)
9567 struct ca0132_spec *spec = codec->spec;
9583 codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__);
9584 snd_hda_apply_pincfgs(codec, alienware_pincfgs);
9587 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__);
9588 snd_hda_apply_pincfgs(codec, sbz_pincfgs);
9591 codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__);
9592 snd_hda_apply_pincfgs(codec, zxr_pincfgs);
9595 codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__);
9596 snd_hda_apply_pincfgs(codec, r3d_pincfgs);
9599 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__);
9600 snd_hda_apply_pincfgs(codec, r3di_pincfgs);
9603 codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__);
9604 snd_hda_apply_pincfgs(codec, ae5_pincfgs);
9607 codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__);
9608 snd_hda_apply_pincfgs(codec, ae7_pincfgs);
9765 static int ca0132_prepare_verbs(struct hda_codec *codec)
9769 struct ca0132_spec *spec = codec->spec;
9810 * Sound Blaster Z cards. However, they have different HDA codec subsystem
9814 static void sbz_detect_quirk(struct hda_codec *codec)
9816 struct ca0132_spec *spec = codec->spec;
9818 switch (codec->core.subsystem_id) {
9831 static int patch_ca0132(struct hda_codec *codec)
9837 codec_dbg(codec, "patch_ca0132\n");
9842 codec->spec = spec;
9843 spec->codec = codec;
9845 /* Detect codec quirk */
9846 quirk = snd_pci_quirk_lookup(codec->bus->pci, ca0132_quirks);
9852 sbz_detect_quirk(codec);
9855 codec->patch_ops = dbpro_patch_ops;
9857 codec->patch_ops = ca0132_patch_ops;
9859 codec->pcm_format_first = 1;
9860 codec->no_sticky_stream = 1;
9870 snd_hda_codec_set_name(codec, "Sound Blaster Z");
9874 snd_hda_codec_set_name(codec, "Sound Blaster ZxR");
9880 snd_hda_codec_set_name(codec, "Recon3D");
9884 snd_hda_codec_set_name(codec, "Recon3Di");
9888 snd_hda_codec_set_name(codec, "Sound BlasterX AE-5");
9892 snd_hda_codec_set_name(codec, "Sound Blaster AE-7");
9924 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20);
9926 codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE.");
9937 ca0132_init_chip(codec);
9939 ca0132_config(codec);
9941 err = ca0132_prepare_verbs(codec);
9945 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL);
9952 ca0132_free(codec);
9966 MODULE_DESCRIPTION("Creative Sound Core3D codec");