Lines Matching refs:outl
38 outl(regptr, emu->port + PTR);
45 outl(regptr, emu->port + PTR);
74 outl(regptr, emu->port + PTR);
76 outl(data, emu->port + DATA);
80 outl(regptr, emu->port + PTR);
81 outl(data, emu->port + DATA);
98 outl(regptr, emu->port + 0x20 + PTR);
115 outl(regptr, emu->port + 0x20 + PTR);
116 outl(data, emu->port + 0x20 + DATA);
246 outl(reg, emu->port + A_IOCFG);
248 outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
250 outl(value, emu->port + A_IOCFG);
252 outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
265 outl(reg, emu->port + A_IOCFG);
267 outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
295 outl(enable, emu->port + INTE);
306 outl(enable, emu->port + INTE);
318 outl(CLIEH << 16, emu->port + PTR);
322 outl(CLIEL << 16, emu->port + PTR);
326 outl(val, emu->port + DATA);
338 outl(CLIEH << 16, emu->port + PTR);
342 outl(CLIEL << 16, emu->port + PTR);
346 outl(val, emu->port + DATA);
357 outl(CLIPH << 16, emu->port + PTR);
360 outl(CLIPL << 16, emu->port + PTR);
363 outl(voicenum, emu->port + DATA);
375 outl(HLIEH << 16, emu->port + PTR);
379 outl(HLIEL << 16, emu->port + PTR);
383 outl(val, emu->port + DATA);
395 outl(HLIEH << 16, emu->port + PTR);
399 outl(HLIEL << 16, emu->port + PTR);
403 outl(val, emu->port + DATA);
414 outl(HLIPH << 16, emu->port + PTR);
417 outl(HLIPL << 16, emu->port + PTR);
420 outl(voicenum, emu->port + DATA);
432 outl(SOLEH << 16, emu->port + PTR);
436 outl(SOLEL << 16, emu->port + PTR);
440 outl(sol, emu->port + DATA);
452 outl(SOLEH << 16, emu->port + PTR);
456 outl(SOLEL << 16, emu->port + PTR);
460 outl(sol, emu->port + DATA);