Lines Matching defs:clock
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
93 /* Map the DSP clock detect bits to the generic driver clock
148 48 kHz, internal clock, S/PDIF RCA mode */
167 /* Check the clock detect bits to see if this is
168 a single-speed clock or a double-speed clock; load
198 u32 control_reg, clock;
202 /* Only set the clock for internal mode. */
205 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
243 clock = 0;
250 clock = GML_96KHZ;
253 clock = GML_88KHZ;
256 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;
259 clock = GML_44KHZ;
262 clock |= GML_SPDIF_SAMPLE_RATE0;
265 clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |
269 clock = GML_22KHZ;
272 clock = GML_16KHZ;
275 clock = GML_11KHZ;
278 clock = GML_8KHZ;
286 control_reg |= clock;
291 "set_sample_rate: %d clock %d\n", rate, clock);
298 static int set_input_clock(struct echoaudio *chip, u16 clock)
303 /* Mask off the clock select bits */
308 switch (clock) {
341 dev_dbg(chip->card->dev, "Set Mona clock to ADAT\n");
349 "Input clock 0x%x not supported for Mona\n", clock);
353 chip->input_clock = clock;
364 /* Set clock to "internal" if it's not compatible with the new mode */