Lines Matching defs:clock
84 /* Map the DSP clock detect bits to the generic driver clock detect bits */
164 /* Only set the clock for internal mode. Do not return failure,
168 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
188 u16 clock;
195 clock = LAYLA20_CLOCK_INTERNAL;
198 clock = LAYLA20_CLOCK_SPDIF;
201 clock = LAYLA20_CLOCK_WORD;
204 clock = LAYLA20_CLOCK_SUPER;
208 "Input clock 0x%x not supported for Layla24\n",
214 chip->comm_page->input_clock = cpu_to_le16(clock);
226 static int set_output_clock(struct echoaudio *chip, u16 clock)
228 switch (clock) {
230 clock = LAYLA20_OUTPUT_CLOCK_SUPER;
233 clock = LAYLA20_OUTPUT_CLOCK_WORD;
236 dev_err(chip->card->dev, "set_output_clock wrong clock\n");
243 chip->comm_page->output_clock = cpu_to_le16(clock);
244 chip->output_clock = clock;