Lines Matching refs:chip
32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
34 static int set_professional_spdif(struct echoaudio *chip, char prof);
35 static int set_digital_mode(struct echoaudio *chip, u8 mode);
36 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
37 static int check_asic_status(struct echoaudio *chip);
40 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
47 if ((err = init_dsp_comm_page(chip))) {
48 dev_err(chip->card->dev,
53 chip->device_id = device_id;
54 chip->subdevice_id = subdevice_id;
55 chip->bad_board = true;
56 chip->input_clock_types =
62 if (chip->device_id == DEVICE_ID_56361) {
63 chip->dsp_code_to_load = FW_GINA24_361_DSP;
64 chip->digital_modes =
69 chip->dsp_code_to_load = FW_GINA24_301_DSP;
70 chip->digital_modes =
77 if ((err = load_firmware(chip)) < 0)
79 chip->bad_board = false;
86 static int set_mixer_defaults(struct echoaudio *chip)
88 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;
89 chip->professional_spdif = false;
90 chip->digital_in_automute = true;
91 return init_line_levels(chip);
96 static u32 detect_input_clocks(const struct echoaudio *chip)
102 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
122 static int load_asic(struct echoaudio *chip)
128 if (chip->asic_loaded)
135 if (chip->device_id == DEVICE_ID_56361)
140 err = load_asic_generic(chip, DSP_FNC_LOAD_GINA24_ASIC, asic);
144 chip->asic_code = asic;
149 err = check_asic_status(chip);
155 err = write_control_reg(chip, control_reg, true);
162 static int set_sample_rate(struct echoaudio *chip, u32 rate)
167 chip->digital_mode == DIGITAL_MODE_ADAT))
171 if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
172 dev_warn(chip->card->dev,
175 chip->comm_page->sample_rate = cpu_to_le32(rate);
176 chip->sample_rate = rate;
182 control_reg = le32_to_cpu(chip->comm_page->control_register);
218 dev_err(chip->card->dev,
225 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */
226 chip->sample_rate = rate;
227 dev_dbg(chip->card->dev, "set_sample_rate: %d clock %d\n", rate, clock);
229 return write_control_reg(chip, control_reg, false);
234 static int set_input_clock(struct echoaudio *chip, u16 clock)
240 control_reg = le32_to_cpu(chip->comm_page->control_register) &
242 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
246 chip->input_clock = ECHO_CLOCK_INTERNAL;
247 return set_sample_rate(chip, chip->sample_rate);
249 if (chip->digital_mode == DIGITAL_MODE_ADAT)
258 if (chip->digital_mode != DIGITAL_MODE_ADAT)
271 dev_err(chip->card->dev,
276 chip->input_clock = clock;
277 return write_control_reg(chip, control_reg, true);
282 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
293 if (chip->input_clock == ECHO_CLOCK_ADAT)
297 if (chip->input_clock == ECHO_CLOCK_SPDIF)
301 dev_err(chip->card->dev,
306 spin_lock_irq(&chip->lock);
309 chip->sample_rate = 48000;
310 set_input_clock(chip, ECHO_CLOCK_INTERNAL);
314 control_reg = le32_to_cpu(chip->comm_page->control_register);
324 if (chip->device_id == DEVICE_ID_56301)
336 err = write_control_reg(chip, control_reg, true);
337 spin_unlock_irq(&chip->lock);
340 chip->digital_mode = mode;
342 dev_dbg(chip->card->dev,
343 "set_digital_mode to %d\n", chip->digital_mode);