Lines Matching refs:WRITEREG
28 #define WRITEREG(value, addr) writel((value), chip->base_addr + (addr))
42 WRITEREG(0, IER);
45 WRITEREG((MRST_N << 16), MC1);
84 WRITEREG(0, IER);
87 WRITEREG((MRST_N << 16), MC1);
109 WRITEREG(acon1, ACON1);
114 WRITEREG(3 * (BurstA1_in) + 3 * (ThreshA1_in) +
119 WRITEREG((EAP << 16) | EAP, MC1);
122 WRITEREG((EI2C << 16) | EI2C, MC1);
124 WRITEREG(A1_out | A2_out | A1_in | IIC_S | IIC_E, IER);
128 WRITEREG(acon2, ACON2);
135 WRITEREG(tsl1[i], TSL1 + (i * 4));
136 WRITEREG(tsl2[i], TSL2 + (i * 4));
173 WRITEREG(dw_page, PageA2_out);
178 WRITEREG(dma_addr, BaseA2_out);
181 WRITEREG(dma_addr + buffer_size, ProtA2_out);
184 WRITEREG(dw_page, PageA1_out);
189 WRITEREG(dma_addr, BaseA1_out);
192 WRITEREG(dma_addr + buffer_size, ProtA1_out);
230 WRITEREG(dw_page, PageA1_in);
235 WRITEREG(dma_addr, BaseA1_in);
238 WRITEREG(dma_addr + buffer_size, ProtA1_in);
279 WRITEREG((TR_E_A2_OUT << 16) | TR_E_A2_OUT, MC1);
283 WRITEREG(acon1, ACON1);
286 WRITEREG((TR_E_A1_OUT << 16) | TR_E_A1_OUT, MC1);
290 WRITEREG(acon1, ACON1);
302 WRITEREG(acon1, ACON1);
304 WRITEREG((TR_E_A2_OUT << 16), MC1);
308 WRITEREG(acon1, ACON1);
310 WRITEREG((TR_E_A1_OUT << 16), MC1);
320 WRITEREG((TR_E_A1_IN << 16) | TR_E_A1_IN, MC1);
327 WRITEREG((TR_E_A1_IN << 16), MC1);
340 WRITEREG(isr, ISR);
344 WRITEREG(0x100, IICSTA);
424 WRITEREG(0x40, GPIO_CTRL);
426 WRITEREG(0x50, GPIO_CTRL);