Lines Matching refs:reg

69 	u16 reg;	/* reg setup */
98 ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
100 return readw(chip->iobase + reg);
104 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
106 writew(val, chip->iobase + reg);
110 ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
112 return readl(chip->iobase + reg);
116 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
118 writel(val, chip->iobase + reg);
185 u16 reg;
189 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
190 ad1889_writew(chip, AD_DS_WSMC, reg);
191 chip->wave.reg = reg;
194 reg = ad1889_readw(chip, AD_DMA_WAV);
195 reg &= AD_DMA_IM_DIS;
196 reg &= ~AD_DMA_LOOP;
197 ad1889_writew(chip, AD_DMA_WAV, reg);
210 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
211 ad1889_writew(chip, AD_DS_RAMC, reg);
212 chip->ramc.reg = reg;
214 reg = ad1889_readw(chip, AD_DMA_ADC);
215 reg &= AD_DMA_IM_DIS;
216 reg &= ~AD_DMA_LOOP;
217 ad1889_writew(chip, AD_DMA_ADC, reg);
229 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
232 return ad1889_readw(chip, AD_AC97_BASE + reg);
236 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
239 ad1889_writew(chip, AD_AC97_BASE + reg, val);
341 u16 reg;
345 reg = ad1889_readw(chip, AD_DS_WSMC);
348 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
351 reg |= AD_DS_WSMC_WA16;
354 reg |= AD_DS_WSMC_WAST;
360 chip->wave.reg = reg;
363 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
379 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
380 chip->wave.addr, count, size, reg, rt->rate);
391 u16 reg;
395 reg = ad1889_readw(chip, AD_DS_RAMC);
398 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
401 reg |= AD_DS_RAMC_AD16;
404 reg |= AD_DS_RAMC_ADST;
410 chip->ramc.reg = reg;
413 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
426 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
427 chip->ramc.addr, count, size, reg, rt->rate);
461 chip->wave.reg = wsmc;
499 chip->ramc.reg = ramc;
517 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
536 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
625 u16 reg;
628 reg = ad1889_readw(chip, AD_DS_WSMC);
630 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
632 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
634 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
637 tmp = (reg & AD_DS_WSMC_WARQ) ?
638 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
639 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
642 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
646 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
649 tmp = (reg & AD_DS_WSMC_SYRQ) ?
650 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
651 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
654 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
656 reg = ad1889_readw(chip, AD_DS_RAMC);
658 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
660 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
662 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
665 tmp = (reg & AD_DS_RAMC_ACRQ) ?
666 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
667 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
670 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
673 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
676 tmp = (reg & AD_DS_RAMC_RERQ) ?
677 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
678 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
681 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
687 reg = ad1889_readw(chip, AD_DS_WADA);
689 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
690 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
691 reg = ad1889_readw(chip, AD_DS_WADA);
693 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
694 (reg & AD_DS_WADA_RWAA) * 3);
696 reg = ad1889_readw(chip, AD_DS_WAS);
697 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
698 reg = ad1889_readw(chip, AD_DS_RES);
699 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
723 u16 reg;
725 reg = ad1889_readw(chip, AD_AC97_ACIC);
726 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
727 ad1889_writew(chip, AD_AC97_ACIC, reg);
731 reg |= AD_AC97_ACIC_ACIE;
732 ad1889_writew(chip, AD_AC97_ACIC, reg);
737 reg = ad1889_readw(chip, AD_AC97_ACIC);
738 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
739 ad1889_writew(chip, AD_AC97_ACIC, reg);