Lines Matching refs:chip
110 #define OPTi93X_PORT(chip, r) ((chip)->port + OPTi93X_##r)
173 static int snd_opti9xx_init(struct snd_opti9xx *chip,
178 chip->hardware = hardware;
179 strcpy(chip->name, snd_opti9xx_names[hardware]);
181 spin_lock_init(&chip->lock);
183 chip->irq = -1;
187 if (isapnp && chip->mc_base)
189 chip->mc_base |= 0xc00;
193 chip->mc_base = 0xf8c;
194 chip->mc_base_size = opti9xx_mc_size[hardware];
197 chip->mc_base_size = opti9xx_mc_size[hardware];
204 chip->password = (hardware == OPTi9XX_HW_82C928) ? 0xe2 : 0xe3;
205 chip->pwd_reg = 3;
210 chip->password = 0xe5;
211 chip->pwd_reg = 3;
218 chip->mc_base = (hardware == OPTi9XX_HW_82C930) ? 0xf8f : 0xf8d;
219 if (!chip->mc_indir_index)
220 chip->mc_indir_index = 0xe0e;
221 chip->password = 0xe4;
222 chip->pwd_reg = 0;
227 snd_printk(KERN_ERR "chip %d not supported\n", hardware);
233 static unsigned char snd_opti9xx_read(struct snd_opti9xx *chip,
239 spin_lock_irqsave(&chip->lock, flags);
240 outb(chip->password, chip->mc_base + chip->pwd_reg);
242 switch (chip->hardware) {
247 outb(reg, chip->mc_base + 8);
248 outb(chip->password, chip->mc_base + chip->pwd_reg);
249 retval = inb(chip->mc_base + 9);
256 retval = inb(chip->mc_base + reg);
263 outb(reg, chip->mc_indir_index);
264 outb(chip->password, chip->mc_base + chip->pwd_reg);
265 retval = inb(chip->mc_indir_index + 1);
270 snd_printk(KERN_ERR "chip %d not supported\n", chip->hardware);
273 spin_unlock_irqrestore(&chip->lock, flags);
277 static void snd_opti9xx_write(struct snd_opti9xx *chip, unsigned char reg,
282 spin_lock_irqsave(&chip->lock, flags);
283 outb(chip->password, chip->mc_base + chip->pwd_reg);
285 switch (chip->hardware) {
290 outb(reg, chip->mc_base + 8);
291 outb(chip->password, chip->mc_base + chip->pwd_reg);
292 outb(value, chip->mc_base + 9);
299 outb(value, chip->mc_base + reg);
306 outb(reg, chip->mc_indir_index);
307 outb(chip->password, chip->mc_base + chip->pwd_reg);
308 outb(value, chip->mc_indir_index + 1);
313 snd_printk(KERN_ERR "chip %d not supported\n", chip->hardware);
316 spin_unlock_irqrestore(&chip->lock, flags);
320 static inline void snd_opti9xx_write_mask(struct snd_opti9xx *chip,
323 unsigned char oldval = snd_opti9xx_read(chip, reg);
325 snd_opti9xx_write(chip, reg, (oldval & ~mask) | (value & mask));
328 static int snd_opti9xx_configure(struct snd_opti9xx *chip,
339 switch (chip->hardware) {
343 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0xf0, 0xfc);
345 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6), 0x02, 0x02);
350 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80);
352 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2), 0x00, 0x20);
354 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0xf0, 0xff);
357 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02);
360 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x00, 0x02);
366 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80);
367 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2), 0x00, 0x20);
369 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0xa2, 0xae);
371 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0x00, 0x0c);
373 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02);
375 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x00, 0x02);
382 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(20), 0x04, 0x0c);
390 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(21), 0x82, 0xff);
395 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(26), 0x01, 0x01);
399 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6), 0x02, 0x03);
400 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(3), 0x00, 0xff);
401 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(4), 0x10 |
402 (chip->hardware == OPTi9XX_HW_82C930 ? 0x00 : 0x04),
404 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(5), 0x20, 0xbf);
409 snd_printk(KERN_ERR "chip %d not supported\n", chip->hardware);
416 chip->wss_base = 0x530;
420 chip->wss_base = 0x604;
424 chip->wss_base = 0xe80;
428 chip->wss_base = 0xf40;
435 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(1), wss_base_bits << 4, 0x30);
494 outb(irq_bits << 3 | dma_bits, chip->wss_base);
496 snd_opti9xx_write(chip, OPTi9XX_MC_REG(3), (irq_bits << 3 | dma_bits));
500 if (chip->hardware > OPTi9XX_HW_82C928) {
542 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(6),
590 static int snd_opti93x_mixer(struct snd_wss *chip)
597 if (snd_BUG_ON(!chip || !chip->pcm))
600 card = chip->card;
602 strcpy(card->mixername, chip->pcm->name);
634 snd_ctl_new1(&snd_opti93x_controls[idx], chip));
643 struct snd_opti9xx *chip = dev_id;
644 struct snd_wss *codec = chip->codec;
650 status = snd_opti9xx_read(chip, OPTi9XX_MC_REG(11));
663 static int snd_opti9xx_read_check(struct snd_opti9xx *chip)
670 chip->res_mc_base = request_region(chip->mc_base, chip->mc_base_size,
672 if (chip->res_mc_base == NULL)
675 value = snd_opti9xx_read(chip, OPTi9XX_MC_REG(1));
676 if (value != 0xff && value != inb(chip->mc_base + OPTi9XX_MC_REG(1)))
677 if (value == snd_opti9xx_read(chip, OPTi9XX_MC_REG(1)))
680 chip->res_mc_indir = request_region(chip->mc_indir_index, 2,
682 if (chip->res_mc_indir == NULL)
685 spin_lock_irqsave(&chip->lock, flags);
686 outb(chip->password, chip->mc_base + chip->pwd_reg);
687 outb(((chip->mc_indir_index & 0x1f0) >> 4), chip->mc_base);
688 spin_unlock_irqrestore(&chip->lock, flags);
690 value = snd_opti9xx_read(chip, OPTi9XX_MC_REG(7));
691 snd_opti9xx_write(chip, OPTi9XX_MC_REG(7), 0xff - value);
692 if (snd_opti9xx_read(chip, OPTi9XX_MC_REG(7)) == 0xff - value)
695 release_and_free_resource(chip->res_mc_indir);
696 chip->res_mc_indir = NULL;
698 release_and_free_resource(chip->res_mc_base);
699 chip->res_mc_base = NULL;
705 struct snd_opti9xx *chip)
714 err = snd_opti9xx_init(chip, i);
718 err = snd_opti9xx_read_check(chip);
722 chip->mc_indir_index = 0;
729 static int snd_card_opti9xx_pnp(struct snd_opti9xx *chip,
755 chip->mc_indir_index = (pnp_port_start(pdev, 3) & ~0xf) | 0xe;
773 chip->mc_base = pnp_port_start(devmc, 0) - 1;
774 chip->mc_base_size = pnp_port_len(devmc, 0) + 1;
800 struct snd_opti9xx *chip = card->private_data;
802 if (chip) {
804 if (chip->irq > 0) {
805 disable_irq(chip->irq);
806 free_irq(chip->irq, chip);
808 release_and_free_resource(chip->res_mc_indir);
810 release_and_free_resource(chip->res_mc_base);
819 struct snd_opti9xx *chip = card->private_data;
837 error = snd_opti9xx_configure(chip, port, irq, dma1, xdma2,
842 error = snd_wss_create(card, chip->wss_base + 4, -1, irq, dma1, xdma2,
851 chip->codec = codec;
870 0, DEV_NAME" - WSS", chip);
876 chip->irq = irq;
877 card->sync_irq = chip->irq;
878 strcpy(card->driver, chip->name);
884 chip->wss_base + 4, irq, dma1, xdma2);
888 card->shortname, codec->pcm->name, chip->wss_base + 4, irq,
905 if (chip->hardware == OPTi9XX_HW_82C928 ||
906 chip->hardware == OPTi9XX_HW_82C929 ||
907 chip->hardware == OPTi9XX_HW_82C924) {
910 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2),
915 snd_opti9xx_write_mask(chip, OPTi9XX_MC_REG(2),
1037 struct snd_opti9xx *chip = card->private_data;
1040 chip->codec->suspend(chip->codec);
1046 struct snd_opti9xx *chip = card->private_data;
1054 error = snd_opti9xx_configure(chip, port, irq, dma1, xdma2,
1058 chip->codec->resume(chip->codec);
1094 struct snd_opti9xx *chip;
1103 chip = card->private_data;
1105 hw = snd_card_opti9xx_pnp(chip, pcard, pid);
1121 if ((error = snd_opti9xx_init(chip, hw))) {
1125 error = snd_opti9xx_read_check(chip);
1127 snd_printk(KERN_ERR "OPTI chip not found\n");