Lines Matching refs:rmh
81 * @rmh: the rmh record to modify
85 * on the rmh and changes its command length.
89 static int vx_set_differed_time(struct vx_core *chip, struct vx_rmh *rmh,
97 rmh->Cmd[0] |= DSP_DIFFERED_COMMAND_MASK;
100 vx_set_pcx_time(chip, &pipe->pcx_time, &rmh->Cmd[1]);
104 rmh->Cmd[1] |= NOTIFY_MASK_TIME_HIGH ;
108 rmh->Cmd[1] |= MULTIPLE_MASK_TIME_HIGH;
112 rmh->Cmd[1] |= STREAM_MASK_TIME_HIGH;
114 rmh->LgCmd += 2;
126 struct vx_rmh rmh;
128 vx_init_rmh(&rmh, pipe->is_capture ?
130 rmh.Cmd[0] |= pipe->number << FIELD_SIZE;
133 vx_set_differed_time(chip, &rmh, pipe);
135 rmh.Cmd[rmh.LgCmd] = (data & 0xFFFFFF00) >> 8;
136 rmh.Cmd[rmh.LgCmd + 1] = (data & 0xFF) << 16 /*| (datal & 0xFFFF00) >> 8*/;
137 rmh.LgCmd += 2;
139 return vx_send_msg(chip, &rmh);
182 struct vx_rmh rmh;
184 vx_init_rmh(&rmh, CMD_IBL);
185 rmh.Cmd[0] |= info->size & 0x03ffff;
186 err = vx_send_msg(chip, &rmh);
189 info->size = rmh.Stat[0];
190 info->max_size = rmh.Stat[1];
191 info->min_size = rmh.Stat[2];
192 info->granularity = rmh.Stat[3];
212 struct vx_rmh rmh;
214 vx_init_rmh(&rmh, CMD_PIPE_STATE);
215 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);
216 err = vx_send_msg(chip, &rmh);
218 *state = (rmh.Stat[0] & (1 << pipe->number)) ? 1 : 0;
237 struct vx_rmh rmh;
239 vx_init_rmh(&rmh, CMD_SIZE_HBUFFER);
240 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);
242 rmh.Cmd[0] |= 0x00000001;
243 result = vx_send_msg(chip, &rmh);
245 result = rmh.Stat[0] & 0xffff;
261 struct vx_rmh rmh;
263 vx_init_rmh(&rmh, CMD_CAN_START_PIPE);
264 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);
265 rmh.Cmd[0] |= 1;
267 err = vx_send_msg(chip, &rmh);
269 if (rmh.Stat[0])
281 struct vx_rmh rmh;
283 vx_init_rmh(&rmh, CMD_CONF_PIPE);
285 rmh.Cmd[0] |= COMMAND_RECORD_MASK;
286 rmh.Cmd[1] = 1 << pipe->number;
287 return vx_send_msg(chip, &rmh);
295 struct vx_rmh rmh;
297 vx_init_rmh(&rmh, CMD_SEND_IRQA);
298 return vx_send_msg(chip, &rmh);
373 struct vx_rmh rmh;
374 vx_init_rmh(&rmh, CMD_STOP_PIPE);
375 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);
376 return vx_send_msg(chip, &rmh);
395 struct vx_rmh rmh;
399 vx_init_rmh(&rmh, CMD_RES_PIPE);
400 vx_set_pipe_cmd_params(&rmh, capture, audioid, num_audio);
403 rmh.Cmd[0] |= BIT_SKIP_SOUND;
407 rmh.Cmd[0] |= BIT_DATA_MODE;
408 err = vx_send_msg(chip, &rmh);
416 vx_init_rmh(&rmh, CMD_FREE_PIPE);
417 vx_set_pipe_cmd_params(&rmh, capture, audioid, 0);
418 vx_send_msg(chip, &rmh);
441 struct vx_rmh rmh;
443 vx_init_rmh(&rmh, CMD_FREE_PIPE);
444 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);
445 vx_send_msg(chip, &rmh);
459 struct vx_rmh rmh;
461 vx_init_rmh(&rmh, CMD_START_ONE_STREAM);
462 vx_set_stream_cmd_params(&rmh, pipe->is_capture, pipe->number);
463 vx_set_differed_time(chip, &rmh, pipe);
464 return vx_send_msg(chip, &rmh);
475 struct vx_rmh rmh;
477 vx_init_rmh(&rmh, CMD_STOP_STREAM);
478 vx_set_stream_cmd_params(&rmh, pipe->is_capture, pipe->number);
479 return vx_send_msg(chip, &rmh);
582 struct vx_rmh rmh; /* use a temporary rmh here */
586 vx_init_rmh(&rmh, CMD_NOTIFY_END_OF_BUFFER);
587 vx_set_stream_cmd_params(&rmh, 0, pipe->number);
588 err = vx_send_msg_nolock(chip, &rmh);
649 struct vx_rmh rmh;
653 vx_init_rmh(&rmh, CMD_STREAM_SAMPLE_COUNT);
654 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);
655 err = vx_send_msg(chip, &rmh);
659 count = ((u64)(rmh.Stat[0] & 0xfffff) << 24) | (u64)rmh.Stat[1];
791 struct vx_rmh rmh;
793 vx_init_rmh(&rmh, CMD_FREE_PIPE);
794 vx_set_pipe_cmd_params(&rmh, 0, pipe->number, 0);
795 if ((err = vx_send_msg(chip, &rmh)) < 0)
797 vx_init_rmh(&rmh, CMD_RES_PIPE);
798 vx_set_pipe_cmd_params(&rmh, 0, pipe->number, pipe->channels);
800 rmh.Cmd[0] |= BIT_DATA_MODE;
801 if ((err = vx_send_msg(chip, &rmh)) < 0)
1130 struct vx_rmh rmh;
1133 vx_init_rmh(&rmh, CMD_SUPPORTED);
1134 if (vx_send_msg(chip, &rmh) < 0) {
1139 chip->audio_outs = rmh.Stat[0] & MASK_FIRST_FIELD;
1140 chip->audio_ins = (rmh.Stat[0] >> (FIELD_SIZE*2)) & MASK_FIRST_FIELD;
1141 chip->audio_info = rmh.Stat[1];