Lines Matching refs:dst_reg
8 /* ALU ops on registers, bpf_add|sub|...: dst_reg += src_reg */
13 .dst_reg = DST, \
21 .dst_reg = DST, \
26 /* ALU ops on immediates, bpf_add|sub|...: dst_reg += imm32 */
31 .dst_reg = DST, \
39 .dst_reg = DST, \
44 /* Short form of mov, dst_reg = src_reg */
49 .dst_reg = DST, \
57 .dst_reg = DST, \
62 /* Short form of mov, dst_reg = imm32 */
67 .dst_reg = DST, \
75 .dst_reg = DST, \
87 .dst_reg = DST, \
93 .dst_reg = 0, \
112 .dst_reg = 0, \
117 /* Memory load, dst_reg = *(uint *) (src_reg + off16) */
122 .dst_reg = DST, \
127 /* Memory store, *(uint *) (dst_reg + off16) = src_reg */
132 .dst_reg = DST, \
137 /* Atomic memory add, *(uint *)(dst_reg + off16) += src_reg */
142 .dst_reg = DST, \
147 /* Memory store, *(uint *) (dst_reg + off16) = imm32 */
152 .dst_reg = DST, \
157 /* Conditional jumps against registers, if (dst_reg 'op' src_reg) goto pc + off16 */
162 .dst_reg = DST, \
172 .dst_reg = DST, \
177 /* Conditional jumps against immediates, if (dst_reg 'op' imm32) goto pc + off16 */
182 .dst_reg = DST, \
192 .dst_reg = DST, \
202 .dst_reg = DST, \
212 .dst_reg = 0, \