Lines Matching refs:status
79 #define IPR_SAMPLERATETRACKER 0x01000000 /* Sample rate tracker lock status change */
92 #define IPR_GPSPDIFSTATUSCHANGE 0x00000800 /* GPSPDIF channel status change */
93 #define IPR_CDROMSTATUSCHANGE 0x00000400 /* CD-ROM channel status change */
145 #define INTE_GPSPDIFENABLE 0x00000010 /* Enable GPSPDIF status interrupts */
146 #define INTE_CDSPDIFENABLE 0x00000008 /* Enable CDSPDIF status interrupts */
250 #define MUSTAT MUCMD /* MPU401 status register (8 bits) */
699 #define CDCS 0x50 /* CD-ROM digital channel status register */
701 #define GPSCS 0x51 /* General Purpose SPDIF channel status register*/
750 /* The 32-bit CLIx and SOLx registers all have one bit per channel control/status */
779 #define CDSRCS 0x60 /* CD-ROM Sample Rate Converter status register */
781 #define GPSRCS 0x61 /* General Purpose SPDIF sample rate cvt status */
783 #define ZVSRCS 0x62 /* ZVideo sample rate converter status */
816 /* The 32-bit HLIx and HLIPx registers all have one bit per channel control/status */
1631 void (*interrupt)(struct snd_emu10k1 *emu, unsigned int status);
1757 void (*hwvol_interrupt)(struct snd_emu10k1 *emu, unsigned int status);
1758 void (*capture_interrupt)(struct snd_emu10k1 *emu, unsigned int status);
1759 void (*capture_mic_interrupt)(struct snd_emu10k1 *emu, unsigned int status);
1760 void (*capture_efx_interrupt)(struct snd_emu10k1 *emu, unsigned int status);
1761 void (*spdif_interrupt)(struct snd_emu10k1 *emu, unsigned int status);